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    NC7SV57 Search Results

    NC7SV57 Datasheets (7)

    Fairchild Semiconductor
    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    NC7SV57
    Fairchild Semiconductor ULP-A Universal Configurable 2-Input Logic Gates Original PDF 197.58KB 11
    NC7SV57FHX
    Fairchild Semiconductor Logic - Gates and Inverters - Multi-Function, Configurable, Integrated Circuits (ICs), IC GATE UNIVERSAL 2INP 6-MICRPAK Original PDF 14
    NC7SV57L6X
    Fairchild Semiconductor TinyLogic ULP-A Universal Configurable 2-Input Logic Gates Original PDF 197.58KB 11
    NC7SV57L6X
    Fairchild Semiconductor TinyLogic ULP-A Universal Configurable 2-Input Logic Gates; Package: MicroPak; No of Pins: 6; Container: Tape & Reel Original PDF 634.09KB 14
    NC7SV57L6X_F113
    Fairchild Semiconductor Logic - Gates and Inverters - Multi-Function, Configurable, Integrated Circuits (ICs), IC GATE 2INPUT ULP-A 6-MICROPAK Original PDF 14
    NC7SV57P6X
    Fairchild Semiconductor TinyLogic ULP-A Universal Configurable 2-Input Logic Gates Original PDF 197.58KB 11
    NC7SV57P6X
    Fairchild Semiconductor TinyLogic ULP-A Universal Configurable 2-Input Logic Gates; Package: SC70; No of Pins: 6; Container: Tape & Reel Original PDF 634.09KB 14
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    NC7SV57 Price and Stock

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    FAIRCHILD NC7SV57L6X

    Multi Function Gate 1-Element 2-IN CMOS 6-Pin MicroPak W T/R
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    Verical () NC7SV57L6X 130,000 1,315
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    NC7SV57L6X 121,189 1,315
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    NC7SV57L6X 63,280 1,315
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    NC7SV57L6X 37,392 1,315
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    NC7SV57L6X 21,100 1,315
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    NC7SV57L6X 10,336 1,315
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    NC7SV57L6X 4,567 1,315
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    FAIRCHILD NC7SV57P6X

    Multi Function Gate 1-Element 2-IN CMOS 6-Pin SC-70 T/R
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    Verical () NC7SV57P6X 27,000 2,385
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    NC7SV57P6X 18,344 2,385
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    NC7SV57P6X 9,000 2,385
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    NC7SV57P6X 8,800 2,385
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    NC7SV57P6X 6,000 2,385
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    NC7SV57P6X 2,475 2,385
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    onsemi NC7SV57P6X

    Multi Function Gate 1-Element 2-IN 6-Pin SC-70 T/R
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    Verical () NC7SV57P6X 3,000 2,385
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    NC7SV57P6X 960 56
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    Avnet Americas NC7SV57P6X Tape & Reel 18,000
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    Arrow Electronics NC7SV57P6X Cut Strips 960 99 Weeks 1
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    Rochester Electronics NC7SV57P6X 6,485 1
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    Flip Electronics NC7SV57P6X 162
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    onsemi NC7SV57L6X

    TinyLogic ULP-A Universal Configurable 2-Input Logic Gates - Tape and Reel (Alt: NC7SV57L6X)
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    Avnet Americas NC7SV57L6X Tape & Reel 10,000
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    Rochester Electronics NC7SV57L6X 52,124 1
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    Flip Electronics NC7SV57L6X 294,250
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    onsemi NC7SV57FHX

    TinyLogic ULP-A Universal Configurable 2-Input Logic Gates - Tape and Reel (Alt: NC7SV57FHX)
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    Avnet Americas NC7SV57FHX Tape & Reel 5,000
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    Flip Electronics NC7SV57FHX 155,000
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    NC7SV57 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    NC7SV57

    Abstract: NC7SV57L6X NC7SV57P6X NC7SV58 NC7SV58L6X NC7SV58P6X
    Contextual Info: Revised March 2004 NC7SV57 • NC7SV58 TinyLogic ULP-A Universal Configurable 2-Input Logic Gates General Description Features The NC7SV57 and NC7SV58 are universal configurable 2-input logic gates from Fairchild’s Ultra Low Power ULP-A Series of TinyLogic. ULP-A is ideal for applications that require extreme high speed, high drive and low


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    nc7sv57nc7sv58nc7sv57l6xnc7sv57p6x+2nc7sv58l6xnc7sv58p6x PDF

    NC7SV57

    Abstract: NC7SV57L6X NC7SV57P6X NC7SV58 NC7SV58L6X NC7SV58P6X
    Contextual Info: Revised June 2002 NC7SV57 • NC7SV58 TinyLogic ULP-A Universal Configurable 2-Input Logic Gates General Description Features The NC7SV57 and NC7SV58 are universal configurable 2-input logic gates from Fairchild’s Ultra Low Power ULP-A Series of TinyLogic. ULP-A is ideal for applications


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    nc7sv57nc7sv58nc7sv57l6xnc7sv57p6x+2nc7sv58l6xnc7sv58p6x PDF

    NC7SV57

    Contextual Info: NC7SV57 / NC7SV58 TinyLogic ULP-A Universal Configurable Two-Input Logic Gates Features Description ̇ ̇ 0.9V to 3.6V VCC Supply Operation ̇ Extremely High Speed tPD - 2.5ns: Typical for 2.7V to 3.6V VCC - 3.1ns: Typical for 2.3V to 2.7V VCC - 4.0ns: Typical for 1.65V to 1.95V VCC


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    nc7sv57nc7sv58nc7v58 PDF

    NC7SV57

    Abstract: NC7SV57P6X NC7SV58 NC7SV58L6X NC7SV58P6X NC7SV57L6X 2-input XOR using 4 2-input NAND gates mark v58 NC7SV57P6
    Contextual Info: Revised January 2003 NC7SV57 • NC7SV58 TinyLogic ULP-A Universal Configurable 2-Input Logic Gates General Description Features The NC7SV57 and NC7SV58 are universal configurable 2-input logic gates from Fairchild’s Ultra Low Power ULP-A Series of TinyLogic. ULP-A is ideal for applications that require extreme high speed, high drive and low


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    nc7sv57nc7sv58nc7sv57p6xnc7sv58l6x+5nc7sv58p6xnc7sv57l6x2-input xor using 4 2-input nand gatesmark v58nc7sv57p6 PDF

    NC7SV57

    Contextual Info: Revised September 2002 NC7SV57 • NC7SV58 TinyLogic ULP-A Universal Configurable 2-Input Logic Gates General Description Features The NC7SV57 and NC7SV58 are universal configurable 2-input logic gates from Fairchild’s Ultra Low Power ULP-A Series of TinyLogic. ULP-A is ideal for applications


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    nc7sv57nc7sv58 PDF

    NC7SV57

    Abstract: CMOS XNOR Gates NC7SV57FHX NC7SV57L6X NC7SV57P6X NC7SV58 NC7SV58FHX NC7SV58L6X NC7SV58P6X TinyLogic h4
    Contextual Info: NC7SV57 / NC7SV58 TinyLogic ULP-A Universal Configurable Two-Input Logic Gates Features Description ƒ ƒ 0.9V to 3.6V VCC Supply Operation ƒ Extremely High Speed tPD - 2.5ns: Typical for 2.7V to 3.6V VCC - 3.1ns: Typical for 2.3V to 2.7V VCC - 4.0ns: Typical for 1.65V to 1.95V VCC


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    nc7sv57nc7sv58nc7v58cmos xnor gates+7nc7sv57fhxnc7sv57l6xnc7sv57p6xnc7sv58fhxnc7sv58l6xnc7sv58p6xtinylogic h4 PDF

    pin configuration of logic gates

    Abstract: NC7SV57 NC7SV57FHX NC7SV57L6X NC7SV57P6X NC7SV58 NC7SV58FHX NC7SV58L6X NC7SV58P6X logic gates pin configuration
    Contextual Info: NC7SV57 / NC7SV58 TinyLogic ULP-A Universal Configurable Two-Input Logic Gates Features Description ƒ ƒ 0.9V to 3.6V VCC Supply Operation ƒ Extremely High Speed tPD - 2.5ns: Typical for 2.7V to 3.6V VCC - 3.1ns: Typical for 2.3V to 2.7V VCC - 4.0ns: Typical for 1.65V to 1.95V VCC


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    nc7sv57nc7sv58nc7v58pin configuration of logic gates+7nc7sv57fhxnc7sv57l6xnc7sv57p6xnc7sv58fhxnc7sv58l6xnc7sv58p6xlogic gates pin configuration PDF

    logic gates pin configuration

    Abstract: pin configuration of logic gates 2-input-XNOR using nand and not NC7SV58FHX NC7SV57 NC7SV57FHX NC7SV57L6X NC7SV57P6X NC7SV58 NC7SV58L6X
    Contextual Info: NC7SV57 / NC7SV58 TinyLogic ULP-A Universal Configurable Two-Input Logic Gates Features Description ƒ ƒ 0.9V to 3.6V VCC Supply Operation ƒ Extremely High Speed tPD - 2.5ns: Typical for 2.7V to 3.6V VCC - 3.1ns: Typical for 2.3V to 2.7V VCC - 4.0ns: Typical for 1.65V to 1.95V VCC


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    nc7sv57nc7sv58nc7v58logic gates pin configuration+7pin configuration of logic gates2-input-xnor using nand and notnc7sv58fhxnc7sv57fhxnc7sv57l6xnc7sv57p6xnc7sv58l6x PDF

    logic gates

    Abstract: SC-70 NC7SV00 NC7SV02 NC7SV04 NC7SV08 NC7SV125 NC7SV32 NC7SV57 NC7SV58
    Contextual Info: Logic Products by Family TinyLogic ULP-A Series Products Logic Product Function Product Description Package Voltage Node NC7SV00 Gate TinyLogic™ ULP-A 2-Input NAND Gate Preliminary MicroPak™ SC70 0.9 1.2 1.5 1.8 2.5 3.3 NC7SV02 Gate TinyLogic™ ULP-A 2-Input NOR Gate (Preliminary)


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    nc7sv00nc7sv02nc7sv04nc7svu04+7nc7sv08nc7sv32nc7sv57nc7sv58nc7sv125logic gatessc-70 PDF

    Arduino Mega2560

    Abstract: 13001 S 6D TRANSISTOR arduino uno rev 3 agilent optical encoder 9988 MZ 13001 TRANSISTOR arduino mega 2650 skiip 613 gb 123 ct arduino sound sensor module pic arduino nano mc34063l
    Contextual Info: ND3% BASE1 XXXX2108-0010-1-P 10 TSQ: 3001 CMS: CMS-USM TS host OP: NN COMP: 15-07-11 Hour: 13:07 TS:TS date TS time MCUS, MPUS, DSPS & DEVELOPMENT TOOLS Find Datasheets Online 8-BIT MCUS & DEVELOPMENT TOOLS 1 PSoC 3 DEVELOPMENT KITS ARDUINO MCU DEVLOPMENT PLATFORM


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    cy8c38cy8c29incl79512t9797+1612t980412t980312t980012t980212t980112t9805arduino mega256013001 s 6d transistorarduino uno rev 3agilent optical encoder 9988mz 13001 transistorarduino mega 2650skiip 613 gb 123 ctarduino sound sensor module picarduino nanomc34063l PDF

    AEC-Q100-006

    Abstract: aec-q100 001 NC7SP125P5X b0332 NC7SV86P5X aec-q100 JESD22-A110 0.35 tsmc cmos front of fabrication process NC7WV04P6X
    Contextual Info: Date Created: 2/5/2004 Date Issued: 3/2/2004 PCN # 20040603 DESIGN/PROCESS CHANGE NOTIFICATION - FINAL Notification of this change was initially distributed via Forecast Change Notice #20031701, issued 5/20/2003. This PCN covers the SC70 packaged products identified


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    q20030061fs35csc-70nc7sp00p5x+16nc7sp05p5xnc7sp126p5xnc7sp158p6xnc7sp32p5xnc7sp57p6xnc7spu04p5xaec-q100-006aec-q100 001nc7sp125p5xb0332nc7sv86p5xaec-q100jesd22-a1100.35 tsmc cmosfront of fabrication processnc7wv04p6x PDF

    FQPF*7N65C APPLICATIONS

    Abstract: bc548 spice model bf494 spice model spice model bf199 LM3171 BC517 spice model bc547 spice model BF494 spice MOC3043-M spice model SPICE model BC237
    Contextual Info: Fairchild PSG.book Page i Wednesday, July 28, 2004 11:12 AM Fairchild Semiconductor Product Catalog Rev. 1 Analog & Mixed Signal Discrete Power Interface & Logic Microcontrollers Optoelectronics RF Power Front Matter.fm Page ii Monday, August 2, 2004 10:09 AM


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    uf4003uf4004uf4005uf4006+16uf4007usb10husb1t1102usb1t11avka75420mw005gfqpf*7n65c applicationsbc548 spice modelbf494 spice modelspice model bf199lm3171bc517 spice modelbc547 spice modelbf494 spicemoc3043-m spice modelspice model bc237 PDF

    cmos nand gate open collector

    Abstract: ttl nand gate 74LVQ00 TTL NOR Gate 74F00 series logic family nand gate NC7SZ332 cd4023bc TTL nand logic gate nand
    Contextual Info: Logic Products by Function Gate Products Logic Product Family Product Description Package Voltage Node 74AC00 FACT Quad 2-Input NAND Gate DIP SOIC SOP TSSOP 3.3 5 74ACT00 FACT ACT Quad 2-Input NAND Gate DIP SOIC SOP TSSOP 5 74ACTQ00 FACT Quiet Series (ACTQ)


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    74ac0074act0074actq0074alvc00+1474f0074lcx0074lvq00cd4011bccd4019bccd4023bccmos nand gate open collectorttl nand gatettl nor gate74f00 series logic familynand gatenc7sz332ttl nandlogic gate nand PDF

    SN74LVC1G157

    Abstract: SN74LVC1g P13A125 ti little logic land pattern for vsop 40 pins SN74LVC2G342 LVC2T45 NC7SZ112 1g125 high speed land pattern for vsop 60 pins
    Contextual Info: R E L I A B L E. L O G I C. TM I N N O V A T I O N. LITTLE LOGIC SELECTION GUIDE CBT DBV AHCT DCK CBTD CBTLV DBV DBV DCK DCK AHC DBV DCK DBV AUC DBV 5 LVC DBV(6) DCK(5) DCT DCK DBV(5) DCT DCK(5) YEP DCK(6) DCU DBV(6) YEP YZP DCK(6) DCU YZP AUP DBV(5) DBV(6)


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    a111103scyt129asn74lvc1g157sn74lvc1g+8p13a125ti little logicland pattern for vsop 40 pinssn74lvc2g342lvc2t45nc7sz1121g125 high speedland pattern for vsop 60 pins PDF

    AEC-Q100-006

    Abstract: aec-q100 001 AEC-Q100 NC7SP125P5X NC7SV86P5X JESD22-A110 NC7SV158 tsmc cmos NC7SV125P5X JESD22 a113
    Contextual Info: Date Created: 2/4/2004 Date Issued: 3/2/2004 PCN # 20040503 DESIGN/PROCESS CHANGE NOTIFICATION - FINAL Notification of this change was initially distributed via Forecast Change Notice #20031701, issued 5/20/2003. This PCN covers the SC70 packaged products identified


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    q20030060fs35csc-70nc7sp00p5x+16nc7sp05p5xnc7sp126p5xnc7sp158p6xnc7sp32p5xnc7sp57p6xnc7spu04p5xaec-q100-006aec-q100 001aec-q100nc7sp125p5xnc7sv86p5xjesd22-a110nc7sv158tsmc cmosnc7sv125p5xjesd22 a113 PDF