MM80C97 Search Results

MM80C96

Abstract: MM70C96 MM80C97 C1995 MM70C95 MM70C97 MM70C98 MM80C95 MM80C98 MM80C98N
Contextual Info: MM70C95 MM80C95 MM70C97 MM80C97 TRI-STATE Hex Buffers MM70C96 MM80C96 MM70C98 MM80C98 TRI-STATE Hex Inverters General Description Features These gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and P-channel enhancement mode transistors The MM70C95 MM80C95

MM80C96

Abstract: mm80c98 MM70C96
Contextual Info: MM70C95/MM80C95, MM70C97/MM80C97 TRI-STATE Hex Buffers MM70C96/MM80C96, MM70C98/MM80C98 TRI-STATE Hex Inverters General Description Features These gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and P-channel en­ hancement mode transistors. The MM70C95/MM80C95

Contextual Info: October 1987 Revised January 1999 SEMICONDUCTOR!!^ Features • Wide supply voltage range: 3.0 VDC to 18 VDC ■ 3-STATE outputs ■ Symmetrical turn on/turn off delays ■ Symmetrical output rise and fall times ■ Pin-for-pin replacement for MM80C97 and MC14503

MM80C96

Abstract: mm80c98 MM80C96N MM70C96
Contextual Info: MM70C95,MM70C96,MM70C97,MM70C98,MM80C95, MM80C96,MM80C97,MM80C98 MM70C95 MM80C95 MM70C97 MM80C97 TRI-STATE Hex Buffers MM70C96 MM80C96 MM70C98 MM80C98 TRI-STATE Hex Inverters Literature Number: SNOS350A MM70C95 MM80C95 MM70C97 MM80C97 TRI-STATE Hex Buffers

CD4503BCJ

Abstract: CD4503B CD4503BC CD4503BM MC14503 MM80C97
Contextual Info: October 1993 CD4503BM/CD4503BC Hex Non-Inverting TRI-STATE Buffer Features • ■ ■ ■ ■ Wide supply voltage range 3.0 Vpc to 18 V qc TRI-STATE outputs Symmetrical turn on/turn off delays Symmetrical output rise and fall times Pin-for-pin replacement for MM80C97 and MC14503

80c97

Abstract: 80c98 80c95 M80C96 MM80C95 MM80C97N
Contextual Info: O ctober 1987 Revised January 1999 SEMICONDUCTOR TM MM80C95 • MM80C97 • MM80C98 3-STATE Hex Buffers • 3-STATE Hex Inverters General Description Features The M M 80C 95, M M 80C 97 and M M 80C 98 gates are m ono­ lithic com plem entary MOS CMOS integrated circuits con­

MM80C96

Contextual Info: O cto b er 198 7 Revised J an u ary 1 9 9 9 SEMICONDUCTOR!!^ MM80C95 • MM80C97 • MM80C98 3-STATE Hex Buffers • 3-STATE Hex Inverters General Description Features T h e M M 8 0 C 9 5 , M M 8 0 C 9 7 and M M 8 0 C 9 8 g ates a re m ono­ • W id e supply voltage range:

MM80C96

Abstract: MM70C96
Contextual Info: Semiconductor February 1988 MM70C95/MM80C95, MM70C97/MM80C97 TRI-STATE Hex Buffers MM70C96/MM80C96, MM70C98/MM80C98 TRI-STATE Hex Inverters General Description Features These gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and P-channel en­

CD4503B

Abstract: CD4503BC CD4503BCJ CD4503BM CD4503BMJ J16A MC14503 MM80C97
Contextual Info: October 1993 CD4503BM/CD4503BC Hex Non-Inverting TRI-STATE Buffer Features • ■ ■ ■ ■ Wide supply voltage range 3.0 Vpc to 18 V qc TRI-STATE outputs Symmetrical turn on/turn off delays Symmetrical output rise and fall times Pin-for-pin replacement for MM80C97 and MC14503

MM80C96

Abstract: MM80C95 MM80C96N MM70C96
Contextual Info: February 1988 Semiconductor & MM70C95/MM80C95, MM70C97/MM80C97 TRI-STATE Hex Buffers MM70C96/MM80C96, MM70C98/MM80C98 TRI-STATE Hex Inverters General Description Features These gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and P-channel en­

MM80C96

Abstract: MM70C96 MM80C95
Contextual Info: MM70C95/MM80C95, MM70C97/MM80C97 TRI-STATE Hex Buffers MM70C96/MM80C96, MM70C98/MM80C98 TRI-STATE Hex Inverters General Description Features These gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and P-channel en­ hancement mode transistors. The MM70C95/MM80C95

mm80c95

Abstract: MM80C97 M16A MM80C95N MM80C97M MM80C97N MM80C98 MM80C98N MS-001 N16E
Contextual Info: Revised January 1999 MM80C95 • MM80C97 • MM80C98 3-STATE Hex Buffers • 3-STATE Hex Inverters General Description Features The MM80C95, MM80C97 and MM80C98 gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and P-channel enhancement mode

MM80C96N

Abstract: MM80C96 ETB10 MM70C96
Contextual Info: MM70C95 MM80C95 MM70C97 MM80C97 TRI-STATE Hex Buffers MM70C96 MM80C96 MM70C98 MM80C98 TRI-STATE Hex Inverters General Description Features These gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and P-channel enhancement mode transistors The MM70C95 MM80C95

M16A

Abstract: MM80C95 MM80C95N MM80C97 MM80C97M MM80C97N MM80C98 MS-001 N16E MM80C96
Contextual Info: O c to b e r 1987 R e v is e d J a n u a ry 1 9 9 9 S E M IC O N D U C TO R T M MM80C95 • MM80C97 • MM80C98 3-STATE Hex Buffers • 3-STATE Hex Inverters G eneral Description Features T h e M M 8 0 C 9 5 , M M 8 0 C 9 7 a n d M M 8 0 C 9 8 g a te s a re m o n o ­

CD4503B

Abstract: 15-V CD4503BH MC14503 MM80C97
Contextual Info: CD4503B Types CM OS Hex Buffer F eatures: H ig h -V o lta g e T ypes 20-Volt Rating m 1 TTL-toad output drive capability • 2 output-disable controls ■ 3-stats outputs ■ Pin compatible with industry types MM80C97, MC14503, and 340097 ■ 5-V, 10 V, and 15-V parametric ratings

Contextual Info: MC14503B Hex Non-Inverting 3-State Buffer The MC14503B is a hex non−inverting buffer with 3−state outputs, and a high current source and sink capability. The 3−state outputs make it useful in common bussing applications. Two disable controls are provided. A high level on the Disable A input causes the outputs of

74C192

Abstract: 74C221 74c901 74C902 74c904 80c95 HD-74C175 HD-74C174 ttl buffer 74C174
Contextual Info: FUNCTION HARRIS NATIONAL TELEDYN E Three State Quad D F lip -F lo p H D -7 4 C 1 73 MM74C173 MM74C173 Hex D Flip -F lo p H D -74C174 MM74C174 Quad D F lip -F lo p H D -74C175 MM74C175 Synchronous 4-Bit Up/ Down Decade Counter H D -74C192 MM74C192 MM74C192

flip-flop 74c74

Abstract: 74C192 74C107 74C193 4 bit binary divider 74c173 74C174 74c902 74c83 74C901
Contextual Info: FUNCTION HARRIS NATIONAL TELEDYN E Three State Quad D F lip -F lo p H D -7 4 C 1 73 MM74C173 MM74C173 Hex D Flip -F lo p H D -74C174 MM74C174 Quad D F lip -F lo p H D -74C175 MM74C175 Synchronous 4-Bit Up/ Down Decade Counter H D -74C192 MM74C192 MM74C192

Contextual Info: CD4503BM/CD4503BC Hex Non-Inverting TRI-STATE Buffer General Description Features The CD4503B is a hex non-inverting TRI-STATE buffer with high output current sink and source capability. TRI-STATE outputs make it useful in bus-oriented applications. Two

4-DIGIT counter with 7-SEGMENT DISPLAY

Abstract: hex to 7 segment 4 digit 7 segment decoder 16 to 4 encoder dip BCD to Hex decoder 4digit 7 segment driver MM74C32 16 to 4 bit binary encoder 8 bit binary to 7 segment MM74C00
Contextual Info: Logic Products by Family 74C CMOS Products Logic Product Function Product Description Package Voltage Node MM74C00 Gate Quad 2-Input NAND Gate DIP SOIC 5 other MM74C02 Gate Quad 2-Input NOR Gate DIP 5 other MM74C04 Inverter Hex Inverter DIP SOIC 5 other MM74C08

4503B

Contextual Info: G E SOLID STATE Ql 3875081 G E SOLID STATE D Ë J 3Ö750Ö1 0013350 0 . 01E 13350 _ D T - ^ 3 CD4503B Types CMOS Hex Buffer Features: High-Voltage Types 20-Volt Rating 3-State Non-Inverting Type T h e R C A -C D 4503B is a hex nonfnverting

Contextual Info: MC14503B Hex Non-Inverting 3-State Buffer The MC14503B is a hex non–inverting buffer with 3–state outputs, and a high current source and sink capability. The 3–state outputs make it useful in common bussing applications. Two disable controls are provided. A high level on the Disable A input causes the outputs of

INVERTER SCHMITT TRIGGER

Abstract: Hex schmitt trigger ecl cmos 74C hex inverter DM74ALS05A
Contextual Info: Logic Products by Function Inverter Products Logic Product Family Product Description Package Voltage Node 74AC04 FACT Hex Inverter DIP SOIC SOP TSSOP 3.3 5 74ACT04 FACT ACT Hex Inverter DIP SOIC TSSOP 5 74ACTQ04 FACT Quiet Series (ACTQ) Quiet Series Hex Inverter

l50-C

Abstract: C0450 Z740
Contextual Info: CD4503B Types COs/MOS Hex Buffer Features: High-Voltage Types 20-Volt Rating 3-State Non-Inverting Type The RCA-C045038 is a hex noninverting buffer with 3-state outputs having high sinkand source-current capability. Two disable controls are provided, one of which controls