MDB190 Search Results

Contextual Info: M MDB190 00ZB Zero Delay Buffer for PCIe Gen1/G Gen2/Gen3 , SI, and QPI SAS, SATA, ES Gen neral Desc cription Featu ures The MDB1900ZB is a true ze ero delay bufffer with a fullyperformance, low-power, and low-phase integrated, high-p e programmable PLL.

DB1900Z

Contextual Info: MDB1900ZC Zero-Delay Buffer for PCI-E Gen1/Gen2/Gen3 , SAS, SATA, ESI, and QPI Revision 1.1 General Description Features The MDB1900ZC is a true zero delay buffer with fullyintegrated high-performance, low-power, and low phase noise programmable PLL. • Supports zero delay (0ps) buffer mode for 100MHz and

CK509B

Abstract: CK410B/CK509B
Contextual Info: MDB1900ZC Zero-Delay Buffer for PCIe Gen1/Gen2/Gen3 , SAS, SATA, ESI, and QPI General Description Features The MDB1900ZC is a true zero delay buffer with a fully integrated high-performance, low-power, and low phase noise programmable PLL. • Supports zero delay (0ps) buffer mode for 100MHz and

Contextual Info: MDB1900ZB Zero Delay Buffer for PCIe Gen1/Gen2/Gen3 , SAS, SATA, ESI, and QPI General Description Features The MDB1900ZB is a true zero delay buffer with a fullyintegrated, high-performance, low-power, and low-phase noise programmable PLL. • Supports zero delay (0ps) buffer mode for 100MHz and

micrel shortform

Abstract: MIC33163 SM802
Contextual Info: February 2015 Shortform Catalog Shortform Catalog February 2015 2015 Micrel, Inc. The information furnished by Micrel, Inc., in this publication is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use, nor any infringements of patents

block diagram for Intel PCIe SSD

Contextual Info: Q2 2015 Volume 56 Q Micrel New Product Highlights Table of Contents MIC28511 – 60V, 3A Synchronous Buck Regulator .2 MIC28512 – 70V, 2A Synchronous Buck Regulator .2