MCGA349 Search Results

MCGA-349

Abstract: atmel 951 MCGA-472
Contextual Info: MCGA 472 Multi Layer Column Grid Array MCGA Package Drawings Code: 2C Date: 24/04/03 Rev. C 4267B–AERO–06/04 1 MCGA349 Code: 2E Date: 06/2003 2 4267B–AERO–06/04 Standard Notes for MCGA 1. All dimensioning and tolerancing conform to ANSI Y14.5 - 1994.

atmel 951

Abstract: 4267C mcga
Contextual Info: MCGA 472 Multi Layer Column Grid Array MCGA Package Drawings Code: 2C and 2G (grounded lid) Date: 24/04/03 Rev. C 4267C–AERO–07/07 1 MCGA349 Code: 2E and 2H (grounded lid) Date: 06/2003 2 4267C–AERO–07/07 MCGA625 Code : 2F (grounded lid) Date : 27/03/2007

CQFP352

Abstract: QFP352 MCGA349 MCGA-349 adc controller vhdl code atmel 268 AT7913 CQFP352 package vhdl code 64 bit FPU SPARC v8 architecture BLOCK DIAGRAM
Contextual Info: ATMEL AT7913E SpaceWire Remote Terminal Controller RTC DATASHEET Features • LEON2-FT Sparc V8 Processor • • • • • • • • • • • 5 stage pipeline 4K instruction caches / 4K data caches Meiko FPU Interrupt Controller Uart serial links

AT697

Abstract: D2578 AT6014F 56 pin edac connector hasp AT49BV802A D3088 AT49BV802 AT697-EVAB pinout socket 754
Contextual Info: AT697 Evaluation Board . User Manual Section 1 Overview. 1-2 1.1 Features .1-2

AT697

Abstract: AT697F AT697E 4426D ASR16
Contextual Info: Features • SPARC V8 High Performance Low-power 32-bit Architecture • • • • • • • • • • • • • • – LEON2-FT 1.0.13 compliant – 8 Register Windows Advanced Architecture: – On-chip Amba Bus – 5 Stage Pipeline – 16 kbyte Multi-sets Data Cache

AT7913

Abstract: AT7913E2U-E VSB32 AT7913e SpaceWire AT697 7833F MCGA-349 AT7913E-2H-E atmel edac
Contextual Info: Features • LEON2-FT Sparc V8 Processor • • • • • • • • • • • • • – 5 stage pipeline – 4K instruction caches / 4K data caches – Meiko FPU – Interrupt Controller – Uart serial links – 32-bit Timers – Memory interface

DIGITAL IC TESTER report for project

Abstract: atmel 504 IO33 ATC18RHA 4261C virage IO33
Contextual Info: Features • Comprehensive Library of Standard Logic and I/O Cells • ATC18RHA Core and IO18 pads Designed to Operate with VDD = 1.8V +/- 0.15V as Main • • • • • • • • • • • • • • Condition IO33 Pad Libraries Provide Interfaces to 3.3+/-0.3V Environments

SDRAM edac

Abstract: AT697 Radiation report AT697 AT697E AT697F SPARC T4-2 at697e-2h-e MQFP256
Contextual Info: Features • SPARC V8 High Performance Low-power 32-bit Architecture – 8 Register Windows • Advanced Architecture: • • • • • • • • • • • • – On-chip Amba Bus – 5 Stage Pipeline – 32 KB 4-way associative Instruction Cache – 16 KB 2-way associative Data Cache

AMBA APB UART

Abstract: atmel 018 AT697 AT697E pinout socket 754 D1313 sparc v8 SPARC v8 architecture BLOCK DIAGRAM D22A
Contextual Info: Features • SPARC V8 High Performance Low-power 32-bit Architecture • • • • • • • • • • • • • – LEON2-FT 1.0.13 compliant – 8 Register Windows Advanced Architecture: – On-chip Amba Bus – 5 Stage Pipeline – 16 kbyte Multi-sets Data Cache

RY 227

Abstract: ROUND ROBIN ARBITRATION AND FIXED PRIORITY "RY 227" at697f AT697F-KG-E 0722402VYC 5962-0722402vyc AT697 AT697F-2H-E ATC18RHA
Contextual Info: Features • SPARC V8 High Performance Low-power 32-bit Architecture – 8 Register Windows • Advanced Architecture: • • • • • • • • • • • • • – On-chip Amba Bus – 5 Stage Pipeline – 16 kbyte Multi-sets Data Cache – 32 kbyte Multi-sets Instruction Cache

MCGA-349

Abstract: MQFPF196 988000
Contextual Info: Pages 1 to 29 INTEGRATED CIRCUITS, SILICON MONOLITHIC, CMOS, GATE ARRAY/EMBEDDED ARRAY BASED ON TYPE MH1RT ESCC Detail Specification No. 9202/076 Issue 2 July 2007 Document Custodian: European Space Agency - see https://escies.org ESCC Detail Specification No. 9202/076

DIGITAL IC TESTER report for project

Abstract: ATMEL 644 IO33 4261F ATC18RHA Genesys Logic MQFP-F196 5962-06B02 atmel 216 4261b
Contextual Info: Features • • • • • • • • • • • • • • • • Comprehensive Library of Standard Logic and I/O Cells ATC18RHA Core pads Designed to Operate with VDD = 1.8V +/- 0.15V as Main Condition IO33 Pad Libraries Provide Interfaces to 3.3+/-0.3V and 2.5 +/- 0.25V Environments

at697f

Abstract: QFP256 DIMENSION ISEL04 xor ttl 74 AT697F-KG-E 0X6C000000 QFP256 Package
Contextual Info: Features • SPARC V8 High Performance Low-power 32-bit Architecture – 8 Register Windows • Advanced Architecture: • • • • • • • • • • • • • – On-chip Amba Bus – 5 Stage Pipeline – 16 kbyte Multi-sets Data Cache – 32 kbyte Multi-sets Instruction Cache

DIGITAL IC TESTER report for project

Abstract: MCGA349 PL33RXZ atmel 504 ATMEL 644 ATC18RHA 5962-06B02 MQFP-T352 IO33 mcga
Contextual Info: Features • • • • • • • • • • • • • • • • Comprehensive Library of Standard Logic and I/O Cells ATC18RHA Core pads Designed to Operate with VDD = 1.8V +/- 0.15V as Main Condition IO33 Pad Libraries Provide Interfaces to 3.3+/-0.3V and 2.5 +/- 0.25V Environments

AT697

Abstract: 4226G AT697F D3/220 DC Kit AT697E MQFP-256 atmel edac D10136
Contextual Info: Features • SPARC V8 High Performance Low-power 32-bit Architecture • • • • • • • • • • • • • • – LEON2-FT 1.0.13 compliant – 8 Register Windows Advanced Architecture: – On-chip Amba Bus – 5 Stage Pipeline – 16 kbyte Multi-sets Data Cache

5962-0722402vyc

Abstract: AT697F bootstrap AT697F 5962-0722402QYC ufc 101 vc 5962R0722402VYC AT697F-KG-E SDRAM edac 5962-0722402QXB MCGA349
Contextual Info: Features • SPARC V8 High Performance Low-power 32-bit Architecture – 8 Register Windows • Advanced Architecture: • • • • • • • • • • • • – On-chip Amba Bus – 5 Stage Pipeline – 32 KB 4-way associative Instruction Cache – 16 KB 2-way associative Data Cache

mcga

Abstract: MCGA-349 MCGA472 MQFPF196 MCGA349 bi 370 transistor MQFPT352 988000 E1 3007
Contextual Info: Pages 1 to 29 INTEGRATED CIRCUITS, SILICON MONOLITHIC, CMOS, GATE ARRAY/EMBEDDED ARRAY BASED ON TYPE MH1RT ESCC Detail Specification No. 9202/076 Issue 3 March 2010 Document Custodian: European Space Agency - see https://escies.org ESCC Detail Specification No. 9202/076

AT697

Abstract: SPARC T4-2 AT697E PCIDMA AT697F AT697F PCI 86MIPS SDRAM edac
Contextual Info: Features • SPARC V8 High Performance Low-power 32-bit Architecture • • • • • • • • • • • • • • – LEON2-FT 1.0.13 compliant – 8 Register Windows Advanced Architecture: – On-chip Amba Bus – 5 Stage Pipeline – 16 kbyte Multi-sets Data Cache

AT697

Abstract: AT697E 86MIPS ASR-24
Contextual Info: Features • SPARC V8 High Performance Low-power 32-bit Architecture • • • • • • • • • • • • • • – LEON2-FT 1.0.13 compliant – 8 Register Windows Advanced Architecture: – On-chip Amba Bus – 5 Stage Pipeline – 16 kbyte Multi-sets Data Cache

Contextual Info: Features • SPARC V8 High Performance Low-power 32-bit Architecture • • • • • • • • • • • • • • – LEON2-FT 1.0.13 compliant – 8 Register Windows Advanced Architecture: – On-chip Amba Bus – 5 Stage Pipeline – 16 kbyte Multi-sets Data Cache

9202076

Abstract: TH1M156ER LGA-349 LGA-472 Po11 T MCGA-349 max 3734 TH1M242ER MQFPT352 324A1
Contextual Info: Pages 1 to 34 INTEGRATED CIRCUITS, SILICON MONOLITHIC, CMOS, GATE ARRAY/EMBEDDED ARRAY BASED ON TYPE MH1RT ESCC Detail Specification No. 9202/076 Issue 4 November 2010 Document Custodian: European Space Agency - see https://escies.org ESCC Detail Specification No. 9202/076

M Meiko

Abstract: AT7913 AT7913E2U-E vhdl code 64 bit FPU AT7913E2H-SV EL B17
Contextual Info: Features • LEON2-FT Sparc V8 Processor • • • • • • • • • • • • • – 5 stage pipeline – 4K instruction caches / 4K data caches – Meiko FPU – Interrupt Controller – Uart serial links – 32-bit Timers – Memory interface