MC1016 Search Results

MC10161

Abstract: MC10162 MC10162FN MC10162L MC10162P
Contextual Info: MC10162 Binary to 1-8 Decoder High The MC10162 is designed to convert three lines of input data to a one–of–eight output. The selected output will be high while all other outputs are low. The enable inputs, when either or both are high, force all outputs low.

MC10164

Abstract: MC10165 MC10165FN MC10165L MC10165P
Contextual Info: MC10165 8-Input Priority Encoder The MC10165 is a device designed to encode eight inputs to a binary coded output. The output code is that of the highest order input. Any input of lower priority is ignored. Each output incorporates a latch allowing synchronous operation. When the clock is low the

MC10162

Abstract: DL122 MC10161
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Binary to 1-8 Decoder High MC10162 The MC10162 is designed to convert three lines of input data to a one–of–eight output. The selected output will be high while all other outputs are low. The enable inputs, when either or both are high, force all outputs low.

MC10164

Abstract: DL122 MC10161 MC10164-D motorola T215
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 8-Line Multiplexer MC10164 The MC10164 is a high speed, low power eight–channel data selector which routes data present at one–of–eight inputs to the output. The data is routed according to the three bit code present on the address inputs. An enable input

BT 816

Abstract: 3 bit magnitude comparator circuit
Contextual Info: MOTOROLA 5-BIT MAGNITUDE COMPARATOR The MC10166 is a high speed expandable 5-bit comparator for comparing the magnitude of two binary words. Two outputs are provided: A < B and A > B. A = B can be obtained by NORing the two outputs with an additional gate. A high level on the enable

Contextual Info: MOTOROLA MC10168 Q U A D LATCH The MC10168 is a Quad Latch w ith common clocking to all four latches. Separate output enabling gates are provided fo r each latch, allowing direct w iring to a bus. When the clock is high, outputs w ill fo llo w the D inputs. Information is latched on the

c10161

Abstract: cq406
Contextual Info: MOTOROLA BINARY TO 1-8 DECODER LOW The MC10161 is designed to decode a three bit input word to a one of eight line output. The selected output w ill be low while all other outputs w ill be high. The enable inputs, when either or both are high, force all outputs high.

circuit diagram of 3 bit magnitude comparator

Abstract: truth table for 4 bit magnitude comparator
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 5 -B it M agn itu d e C om parator The MC10166 is a high speed expandable 5—bit comparator for comparing the magnitude of two binary words. Two outputs are provided: A < B and A > B. A = B can be obtained by NORing the two outputs with an additional gate. A

MC10156

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 5 -B it M agnitude Com parator The MC10166 is a high speed expandable 5 -b it comparator for comparing the magnitude of two binary words. Two outputs are provided: A < B and A > B. A = B can be obtained by NORing the two outputs with an additional gate. A

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 12-Bit Parity Generator-Checker The MC10160 consists of nine Exdiisive-OR gates in a single package, internally connected to provide odd parity checking or generation. Output goes high when an odd number of Inputs are high. Unconnected inputs are pulled to

13Q4

Abstract: MC10161 MC10115 MC10136 MC10161FN MC10161L MC10161P MC10164 PLCC20 12-Q-5
Contextual Info: MC10161 Binary to 1-8 Decoder Low The MC10161 is designed to decode a three bit input word to a one of eight line output. The selected output will be low while all other outputs will be high. The enable inputs, when either or both are high, force all outputs high.

MC10160

Abstract: DL122
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 12-Bit Parity Generator-Checker MC10160 The MC10160 consists of nine Exclusive-OR gates in a single package, internally connected to provide odd parity checking or generation. Output goes high when an odd number of inputs are high. Unconnected inputs are pulled to

marking t132

Abstract: MC10168 MC10168FN MC10168L MC10168P
Contextual Info: MC10168 Quad Latch The MC10168 is a Quad Latch with common clocking to all four latches. Separate output enabling gates are provided for each latch, allowing direct wiring to a bus. When the clock is high, outputs will follow the D inputs. Information is latched on the negative–going

MC10162P

Abstract: MC10161 MC10162 MC10162FN MC10162L
Contextual Info: MC10162 Binary to 1-8 Decoder High The MC10162 is designed to convert three lines of input data to a one–of–eight output. The selected output will be high while all other outputs are low. The enable inputs, when either or both are high, force all outputs low.

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 8-Line Multiplexer MC10164 The MC10164 is a high speed, low power eight-channel data selector which routes data present at one-of-eight inputs to the output. The data is routed according to the three bit code present on the address inputs. An enable input

MC1016

Abstract: rs FLIPFLOP SCHEMATIC MC1216 MC12
Contextual Info: Æ S S t AND N EG A TIV E CLOCK MC1016 MC1216 \ M E C L " M C 1 0 0 0 /1 2 0 0 series V _ _ _ _ _ _ Two dc storage flip-flops w ith a positive clock input provided for each flip-flop. This device is useful as a dual storage element re­

MC10136

Abstract: MC10161 MC10101 MC10115 DL122 MC10164 MC10161-D MC10115 application E1156
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Binary to 1-8 Decoder Low MC10161 The MC10161 is designed to decode a three bit input word to a one of eight line output. The selected output will be low while all other outputs will be high. The enable inputs, when either or both are high, force all outputs high.

Contextual Info: MOTOROLA MC10161 BINARY TO 1-8 DECODER LOW The MC10161 is designed to decode a three b it input w ord to a one o f eight line output. The selected output w ill be low w hile all other outputs w ill be high. The enable inputs, when either or both are high, force all outputs high.

Socket T 775 pin

Contextual Info: MOTOROLA MC10160 12-BIT PARITY GENERATOR-CHECKER 12-BIT PARITY GENERATOR-CHECKER The MC10160 consists of nine EXCLUSIVE-OR gates in a single package, internally connected to provide odd parity checking or generation. Output goes high when an odd number of inputs are

Contextual Info: MOTOROLA 8-INPUT PRIO RITY ENCODER The MC10165 is a device designed to encode eight inputs to a binary coded output. The output code is that of the highest order input. Any input of lower priority is ignored. Each output incor­ porates a latch allowing synchronous operation. When the clock

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 12-Bit Parity Generator-Checker The MC10160 consists of nine Exclusive-OR gates in a single package, internally connected to provide odd parity checking or generation. Output goes high when an odd number of inputs are high. Unconnected inputs are pulled to

MC10160

Abstract: MC10160FN MC10160L MC10160P
Contextual Info: MC10160 12-Bit Parity Generator-Checker The MC10160 consists of nine Exclusive-OR gates in a single package, internally connected to provide odd parity checking or generation. Output goes high when an odd number of inputs are high. Unconnected inputs are pulled to low logic levels allowing parity

Contextual Info: MC10163 MC10193 MOTOROLA ERROR DETECTION- CORRECTION CIRCUIT The MC10163 and the MC10193 are error detection and correc­ tion circuits. They are building blocks designed for use with mem­ ory systems. They offer economy in the design of error detection/

MC10161

Abstract: MC10136 MC10115 MC10115 application MC10161FN MC10161L MC10161P MC10164
Contextual Info: MC10161 Binary to 1-8 Decoder Low The MC10161 is designed to decode a three bit input word to a one of eight line output. The selected output will be low while all other outputs will be high. The enable inputs, when either or both are high, force all outputs high.