M54HC03 Search Results

74HC03

Contextual Info: M54HC03 M74HC03 Æ T SGS-THOMSON HO ®IILIl g¥K(Q Ri]D©i QUAD 2-INPUT OPEN DRAIN NAND GATE • LOW POWER DISSIPATION Ice = 1 (MAX.) at TA = 25° C ■ HIGH NOISE IMMUNITY VNIH = VN|L = 28% VCC (MIN.) ■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS ■ SYMMETRICAL OUTPUT IMPEDANCE

74LS03

Abstract: M54HC03 M54HC03F1R M74HC03 M74HC03B1R M74HC03C1R M74HC03M1R 74HC03
Contextual Info: M54HC03 M74HC03 QUAD 2-INPUT OPEN DRAIN NAND GATE . . . . . . . HIGH SPEED tPZ = 5 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS BALANCED PROPAGATION DELAYS

74HC03

Abstract: M54HC03 M74HC03
Contextual Info: HS-CMOS 4 ' ’ Is M54HC03 MÜHC03 INTEGRATED CIRCUITS PRODUCT PREVIEW QUAD 2-INPUT NAND OPEN DRAIN DESCRIPTION The M54/74HC03 is a high speed CMOS QUAD 2-INPUT NAND (OPEN DRAIN) fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL

Contextual Info: M54HC03 M74HC03 T S G S -T H O M S O N QUAD 2-INPUT OPEN DRAIN NAND GATE • LOW POWER DISSIPATION lCC = 1 /*A MAX. at Ta = 25°C .-" \ ■ HIGH NOISE IMMUNITY V nih = V nil = 28% Vcc (MIN.) ■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS ■ SYMMETRICAL OUTPUT IMPEDANCE

M54HC03

Abstract: M54HC03D M54HC03K
Contextual Info: M54HC03 RAD-HARD QUAD 2-INPUT OPEN DRAIN NAND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 8ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) BALANCED PROPAGATION DELAYS:

Contextual Info: r z 7 SCS-THOMSON M54HC03 M74HC03 È QUAD 2-INPUT OPEN DRAIN NAND GATE HIGH SPEED tpz = 5 ns TYP. AT Vcc = 5 V LOW POWER DISSIPATION Icc = 1 nA (MAX.) AT Ta = 25 “C HIGH NOISE IMMUNITY V nih = V nil = 28 % Vcc (MIN.) OUTPUT DRIVE CAPABILITY 1 0 LSTTLLOADS

940900701F

Abstract: 54HC4053 54HC273 940501301F 920305001F 940104801F 920110601F 54HC08 920112001F 940806401F
Contextual Info: M54HCxxx M54HCTxxx Rad-hard high speed 2 to 6 V CMOS logic series Features • 2 to 6 V operating voltage ■ Low power DC dissipation: 1 µA max at 25°C ■ High speed tPD = 8 ns typ at 25°C ■ Symmetrical outputs characteristics ■ High noise immunity: 28% of min VCC

M54HC132

Abstract: M54HC595KG M54HC138KG 920112001F
Contextual Info: M54HCxxx, M54HCTxxx Rad-hard high speed 2 to 6 V CMOS logic series Datasheet - production data Features • 2 to 6 V operating voltage • Low power DC dissipation: 1 µA max. at 25 °C • High speed tPD = 8 ns typ. at 25 °C • Symmetrical outputs characteristics

54HC4053

Abstract: 940104801F 940900701F 54HC08 940806401F M54HC245K 54HC273 920110501F 940104701F 920110601F
Contextual Info: M54HCxxx M54HCTxxx Rad-hard high speed 2 to 6 V CMOS logic series Features • 2 to 6 V operating voltage ■ Low power DC dissipation: 1 µA max at 25°C ■ High speed TPD = 8 ns typ at 25°C ■ Symmetrical outputs characteristics ■ High noise immunity: 28% of min VCC

940900703F

Contextual Info: M54HCxxx M54HCTxxx Rad-hard high speed 2 to 6 V CMOS logic series Features • 2 to 6 V operating voltage ■ Low power DC dissipation: 1 µA max at 25°C ■ High speed tPD = 8 ns typ at 25°C ■ Symmetrical outputs characteristics ■ High noise immunity: 28% of min VCC

74hc03

Abstract: 54HC 74HC M54HC03 M74HC03 74LS03 74HC03 equivalent
Contextual Info: SGS -THOMSON M 54HC03 M 74HC03 QUAD 2-INPUT OPEN DRAIN NAND GATE • LOW POWER DISSIPATION Ice = 1 /¿A MAX. a t TA = 25°C ■ HIGH NOISE IMMUNITY Vnih = V n il = 2 0/,° ^cc (MIN.) ■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS ■ SYMMETRICAL OUTPUT IMPEDANCE

940806401F

Contextual Info: M54HCxxx, M54HCTxxx Rad-hard high speed 2 to 6 V CMOS logic series Datasheet - production data Features • 2 to 6 V operating voltage  Low power DC dissipation: 1 µA max. at 25 °C  High speed tPD = 8 ns typ. at 25 °C  Symmetrical outputs characteristics

Contextual Info: SbE D £ = 7 S G S - • T 7^237 H O M S O 0G3R73Ö öfil ■ S G T H M 54H C 03 M 74H C 03 N ^ T # . llO E IILIi(gìlsì®liìilO(gi S 6 S-THOnSON T -l? -? -! QUAD 2-INPUT OPEN DRAIN NAND GATE ■ LOW POWER DISSIPATION Ice = 1 I t A (MAX. at TA = 25°C

CI 74LS08

Abstract: IC PIN CONFIGURATION OF 74LS08 PIN CONFIGURATION OF 74LS08 ic and gate 74LS08 pin configuration CI AND 74LS08 74LS08M pin configuration logic symbol 74LS08 PIN CONFIGURATION OF 74LS08 HCOS
Contextual Info: rrr Ä T# s g s -th o m s o n m54 hcos IM D S i« ! » « ! M74HC03 QUAD 2-INPUT OPEN DRAIN NAND GATE • HIG HSPEED tpz = 5 ns TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 1 |iA (MAX.) A T T a = 25°C ■ HIGH NOISE IMMUNITY V nih = V n il = 28 % V cc (MIN.)