SN74ALS244a
Abstract: 54ALS244A SN54ALS244A 54AS244 SN54AS244 SN74AS244 54ALS244
Contextual Info: SN 54A LS244A , S N 54A S244, S N 74A LS244A , SN 74 A S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS D 2 6 6 1 , DECEM BER 1 9 8 2 -R E V IS E D M A Y 1 9 8 6 3-S tate Outputs Drive Bus Lines or Buffer Memory Address Registers • P-N-P Inputs Reduce DC Loading
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sn54als244asn54as244sn74als244asn74as244+9d2s611982-revised300-milals240aals241aas24054als244a54as24454als244
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SN74ALS244A
Abstract: LS244A SN54ALS244A
Contextual Info: TYPES LS244A, SN54AS244, LS244A, SN74AS244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS D 2 6 6 1 , DECEMBER 1 9 8 2 -R E V IS E D DECEMBER 1 9 8 3 S N 54A LS244A, S N 54A S 244 . . . J PACKAGE 3 -S ta te O u tp u ts Drive Bus Lines or B u ffe r M em ory
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sn54als244asn54as244sn74als244asn74as244+1ls244a
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TEXTOOL zif socket
Abstract: TEXTOOL zif 40 pin socket TEXTOOL SOCKET DIP16 MS-012-AB TEXTOOL zif dip socket 74ALS 74ALS244A 74ALS244A-1 74ALS244A-1D 74ALS244A-1N
Contextual Info: 1ÖE D NAPC/ S I G N E T I C S bbS3^2M ÜGMÜSS7 0 « S IC 3 LS244A, LS244A-1 Signetics Buffer ALS Products Octal Buffer 3-State Product Specification FEATURES • Octal bus interface • 3-Slate buffer outputs sink 24mA and source 15mA • The -1 version sinks 48mA I,
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74als244a74als244a-112-ab5m-1982+8textool zif sockettextool zif 40 pin sockettextool socket dip16ms-012-abtextool zif dip socket74als74als244a-1d74als244a-1n
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M74ALS374P
Abstract: dd127 4d40t
Contextual Info: MITSUBISHI iDGTL LOGIC} TI 1mF | bSLHÖ27 D0155E5 5 MITSUBISHI ALSTTLs ,oC* M 74A LS374P OCTAL D-TYPE EDGE-TRIGGERED FLIP FLOP W ITH 3-STATE OUTPUT NONINVERTED 6249827 MITSUBISHI 9 1D 12525 (DGTL LOGIC) DESCRIPTION D PIN CONFIGURATION (TOP VIEW) T h e M 7 4 A L S 3 7 4 P is a s e m ic o n d u c to r in te g ra te d c irc u it
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d0155e5ls374p16p2p16-pin+8150milt-90-2020p2v20-pin300milm74als374pdd1274d40t
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D0-15L
Abstract: LS74AD
Contextual Info: 7 z1 % > -'0 '7 -¿ ? S ' M 74ALS873AP ¡C' 3< DUAL 4 -B IT D-TYPE TRANSPARENT LATCH W ITH 3-STATE OUTPUT NONINVERTED 50t° CDGTL LOGIC) DESCRIPTION PIN CONFIGURATION (TOP VIEW) DIR EC T RESET , p " IN P U T I M ° O UTPUT } -q C O N TR O L IN PU T E c
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74als873apm74als873ap16p2p16-pin+7150milt-90-2020p2v20-pin300mild0-15lls74ad
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M74ALS193P
Abstract: TF2N 154027
Contextual Info: MITSUBISHI I -CDGTL L O G I C ? =11 De | bEMTñE? □□12454 ñ T~ ^ MITSUBISHI ALSTTLs . M74ALS193P SYNCHRONOUS PRESETTABLE U P /D O W N 4 -B IT B IN A R Y COUNTER 6248827 MITSUBISHI ÍDGTL LOGIC DESCRIPTION The M74ALS193P is a semiconductor integrated circuit
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m74als193p16p2p16-pin150mil+5t-90-2020p2v300miltf2n154027
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ALS244B-1
Abstract: 74*2448 74ALS244B-1N 74ALS244B-1WM 74LS DM74 DM74ALS244AN DM74ALS244ASJ DM74ALS244AWM
Contextual Info: S E M IC O N D U C T O R tm LS244A/74ALS244B-1 Octal 3-STATE Bus Driver General Description Features This octal 3-STATE bus driver is designed to provide the d e signer with flexibility in im plem enting a bus interface with memory, microprocessor, o r com m unication system s. This
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als244a/74als244b-164-extended74*2448+774als244b-1n74als244b-1wm74lsdm74dm74als244andm74als244asjdm74als244awm
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dd127
Contextual Info: D e | hS4clflE!7 GG1E3M7 7 |~~ MIT SUB ISHI íDGTL LOGIC} TI MITSUBISHI ALSTTLs M74ALS15AP 6249827 MITSUBISHI <DGTL LOGI C 91D 12347 D TRIPLE 3-IN P U T POSITIVE AND GATE W ITH OPEN COLLECTOR OUTPUT DESCRIPTION Th e M 7 4A L S 15A P is a se m ic o n d u c to r in teg rated circu it
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m74als15ap16p2p16-pin150mil+5t-90-2020p2v20-pin300mildd127
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1e4d
Abstract: ls151p LS29 LS245 74als15
Contextual Info: MITSUBISHI -CDGTL LOGIC} TI -DE | 00123^0 S MITSUBISHI ALSTTLs ,o c* M 7 A L S ! 4 5 1 JP T-66-21-53 8-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER WITH STROBE 6249827 MITSUBISHI DGTL LOGIC r DESCRIPTION T h e M 7 4A L S 151 P is a sem iconductor in teg rated circuit
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t-66-21-5316p2p16-pin150mil+9t-90-2020p2v20-pin300mil1e4dls151pls29ls24574als15
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LS353P
Abstract: d12518 74ALS04A
Contextual Info: MI TSU BISHI {DGTL LOGIC! TI » F l b5MTÖ27 0Q1SS1Ö fl | ~ MITSUBISHI ALSTTLs M 74A LS353P o O ° DUAL 4 -U N E TO 1-LINE DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUT INVERTED 6249827 MITSUBISHI 9 1 D 12518 (DGTL LOGI C) DESCRIPTION T h e M 7 4A L S 353 P is a sem iconductor integrated circuit
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ls353p16p2p16-pin150mil+5t-90-2020p2v300mild1251874als04a
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MS-012-AB
Abstract: 74ALS 74ALS244A 74ALS244A-1 74ALS244A-1D 74ALS244A-1N 74ALS244AD 74ALS244AN TEXTOOL zif socket DIP 32 BN 5115
Contextual Info: Signetics LS244A, LS244A-1 Buffer ALS Products Octal Buffer 3-State Product Specification FEATURES • Octal bus interface • 3-State buffer outputs sink 24mA and source 15mA • The -1 version sinks 48mA lQL within the ±5% Vc c range TY P E T Y P IC A L P R O P A G A T IO N
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74als244a74als244a-15m-1982eounterdock-22+8ms-012-ab74als74als244a-1d74als244a-1n74als244ad74als244antextool zif socket dip 32bn 5115
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SN7401
Abstract: National Semiconductor 4045 transistor bf 175 74ALS569 74AS1008 SN7449 SN74ALS244A SN54ALS1000A SN74ALS519 SN54ALS27
Contextual Info: GENERAL INFORMATION ORDERING INSTRUCTIONS AND MECHANICAL DATA FUNCTIONAL INDEX/SELECTION GUIDE PRODUCT GUIDE ADVANCED LOW-POWER SCHOTTKY AND ADVANCED SCHOTTKY CIRCUITS PROGRAMMABLE LOGIC ARRAYS BETA PRODUCTS EXPLANATION OF NEW LOGIC SYMBOLS CONNECTOR AND KEYBOARD PRODUCTS
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sn54/74sn54als8003sn74als8003sn7401+9national semiconductor 4045transistor bf 17574als56974as1008sn7449sn74als244asn54als1000asn74als519sn54als27
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74ALS244AP
Abstract: M74ALS244AP
Contextual Info: M ITSUBISHI -CDGTL LOGIC} 11 D E ^ hdHTäd r- UüJjd47b~7 J f~ MITSUBISHI ALSTTLs M LS244AP 6249827 MITSUBISHI DGTL LOGIC 91D 12476 D OCTAL B U F F E R /L IN E D R IVER W IT H 3-S TA TE O U TP U T (N O N IN V E R T E D ) ~ r - S 2 .- o 7 PIN CONFIGURATION (TOP VIEW)
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jjd47b74als244apm74als244ap16p2p+616-pin150milt-90-2020p2v20-pin300mil
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74als05
Abstract: 74als245a LS574A
Contextual Info: MITSUBISHI íDGTL I LOGIC} _ TI 6249827 MITSUBISHI D eT | bEMTflE? □D lE 7t.l t I MITSUBISHI ALSTTLs M 74ALS1 6 2 3 AP DGTL LOGIC - 91D 12761 D OCTAL BUS TRANSCEIVER W ITH 3-STATE OUTPUT (NONINVERTED) 7 = 5 2 ? -3 / DESCRIPTION PIN CONFIGURATION (TOP VIEW)
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74als1m74als1623ap74als623ap16p2p+916-pin150milt-90-2020p2v20-pin300mil74als0574als245als574a
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54ALS244A
Abstract: SN74ALS244A SN54ALS244A 74as244
Contextual Info: LS244A, SN54AS244, LS244A, SN74AS244 OCTAL BUFFERS AND LINE DRIVERS WITH 3 STATE OUTPUTS D 2 6 6 1 , D E C E M B E R 1 9 8 2 - R E V iS E O M A Y 1 9 8 6 • 3-State Outputs Drive Bus Lines or Buffer Memory A ddress Registers • P-N-P Inputs Reduce D C Loading
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sn54als244asn54as244sn74als244asn74as244+3300-m54als244a74as244
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1d12407
Contextual Info: MITSUBISHI -CDGTL LOGICI TI TËj|t,EMTâ27 DDiaHO? □ MITSUBISHI ALSTTLs o c ^ , * 0 M 7 4 A LS 15 8 P 6249827 MITSUBISHI CDGTL L O GI C :' • T-66-21-51 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER INVERTED) 9 1 D 12407 DESCRIPTION The M 74ALS158P is a sem iconductor integrated circuit
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t-66-21-5174als158p16p2p16-pin+6150milt-90-2020p2v20-pin300mll1d12407
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74ALS04A
Abstract: LS08D 74ALS37A LS193D
Contextual Info: MITSUBISHI -CDGTL LOGIC} 1>Ë| bEM^ôE? QaiaasT 3 | ” =11 MITSUBISHI ALSTTLs M 74A LS 30A P 6249827 MITSUBISHI D G T L LOGIC 91D D 1235 9 SINGLE 8-IN P U T POSITIVE NAND GATE | 5 — DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M74ALS30AP is a semiconductor integrated circuit
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m74als30ap16p2p16-pin150mil+8t-90-2020p2v20-pin300mil74als04als08d74als37als193d
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LS192P
Abstract: 74ALS38
Contextual Info: MITSUBISHI -CDGTL LOGIC]-*!! bSMTñí? D 0 1 5 4 5 G □ |"~ MITSUBISHI ALSTTLs iV jG Ï M 74A LS192P ,* o o SYNCHRONOUS PRESETTABLE UP/DOW N DECADE COUNTER 6249827 M1 t s H j e h s h i 9 1D D G fL ~ ~ L d G ~ i~ cJ ~ DESCRIPTION 12450 D PIN CONFIGURATION (TOP VIEW
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ls192p16p2p16-pin150mil+5t-90-2020p2v20-pin300mil74als38
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