LS0112B Search Results

QAL22V10-30L

Abstract: PAL22V10 GAL22V10 National gal programming algorithm LY1040 GAL22V10 GAL Gate Array Logic
Contextual Info: GAL22V10 NATL SEMICOND LS0112b b3E D MEMORY DGb7b45 «NSCB National mm Semiconductor GAL22V10, -15, -20, -25, -30 Generic Array Logic General Description Features The NSC E2CMOS GAL devices combine a high per­ formance CMOS process with electrically erasable floating

Contextual Info: Q3283T • LS0112B □ □ 7 T 7 2 7 bl4 ■ NSC1 53 National Semiconductor 74ACTQ3283T 32-Bit Latchable Transceiver with Parity Generator/Parity Checker and Byte Multiplexing with TRI-STATE Outputs General Description Features T h e 'AC TQ 3283T is a 32-bit latchable transceiver w ith parity

73sb

Abstract: 1N916 26LS30 26LS32 DS8925 DS8925M M16A 11b95-12 d0ji G0735
Contextual Info: DS8925 N a t i o n a l t S e m i c o n d u c t o r ß DS8925 LocalTalk Dual Driver/Triple Receiver General Description Features The DS8925 is a dual driver/triple receiver device optimized to provide a single chip solution for a LocalTalk Interface. The device provides one differential TIA/EIA-422 driver,

DP8308N

Abstract: LS0112B
Contextual Info: <ß National •o 00 Cd Semiconductor DP8308 8-Bit TRI-STATE Bidirectional Transceiver Non-Inverting General Description Features The DP8308 is a high speed Schottky 8-bit TRI-STATE bidi­ rectional transceiver designed to provide bidirectional drive for bus oriented microprocessor and digital communications

DS3695

Abstract: DS36C279 DS36C279T DS75176 LTC485 MAX485 RS48S DS751
Contextual Info: DS36C279 N a t i o n a l S e m i c o n d u c t o r DS36C279 Low Power EIA-RS-485 Transceiver with Sleep Mode General Description Features The DS36C279 is a low power differential bus/line trans­ ceiver designed to meet the requirements of RS-485 Stan­ dard for multipoint data transmission. In addition it is com­

FZH 261

Abstract: fzh 141 ETA-42 FZH 135 FZH 145 FZH 145 b FZH 161 26LS30 FZH 135 OF EtA-423
Contextual Info: April 1994 DS8925 LocalTalk Dual D riv e r/T rip le R eceiver General Description Features The DS8925 is a dual d rive r/trip le receiver device optim ized to provide a single chip solution for a LocalTalk Interface The device provides one differential T IA /E IA -4 2 2 driver,

CS06

Abstract: M08A
Contextual Info: NM93CS06L/CS46L/CS56L/CS66L 256-/1024-/2048-/4096-Bit Serial EEPROM with Extended Voltage 2.0V to 5.5V and Data Protect (MICROWIRE Bus Interface) General Description The NM93CS06L/CS46L/CS56L/CS66L devices are 256/1024/2048/4096 bits, respectively, of non-volatile

vouchers

Contextual Info: ß May 1996 QR1001 QuickRing Enhanced Data Stream Controller General Description Features QuickRing technology is a point-to-point data transfer archi­ tecture designed to facilitate high speed data streams be­ tween devices, boards and systems. The QuickRing archi­

L0747

Abstract: BRQ TI 7C l0147 ac1ta 70324 107476 Futurebus 1203 6d DS3805 tl 0741
Contextual Info: DS3875 £3 National J y f l S e m ic o n d u c to r DS3875 Futurebus+ Arbitration Controller General Description The DS3875 Futurebus+ Arbitration Controller is a member of National Semiconductor's Futurebus + chip set designed specifically for the IEEE 896.1 Futurebus+ standard. The