L64814 Search Results

tms390

Abstract: L64811 L64814 TMS390C sun sparc pinout
Contextual Info: LSI LOGIC L64814 Floating-Point Unit FPU Preliminary Description The L64814 Floating-Point Unit (FPU) is a highperformance, CMOS implementation of the SPARC (Scalable Processor ARChitecture) FPU. The FPU combines a floating-point controller w ith a high-throughput floating-point processor

L64811

Contextual Info: LSI LOGIC L64811 Integer Unit IU Preliminary Description The L64811 Integer Unit (III) is a high-speed CMOS implementation of the SPARC 32-bit Reduced Instruction Set Computer (RISC) a rch i­ tecture processor. This architecture specifies a processor w hich can execute instructions at a

Contextual Info: LSI LOGIC \ L64811 Integer Unit IU Preliminary Description The 1648111nteger Unit (III) is a high-speed CMOS implementation of the SPARC 32-bit Reduced Instruction Set Computer (RISC) archi­ tecture processor.This architecture specifies a processor which can execute instructions at a

ML4008

Abstract: L64811 l64844 L64852 SparKIT-20 pc motherboard schematics L64801 L64854 L64825
Contextual Info: 5304ÔQ4 001DE53 < ^ 3 « L L C After the SPARCstation from Sun Microsystems became an international workstation standard, vendors began to show increasing interest in the SPARC-compatible market in the United States, along the Pacific rim, and in Europe. To facilitate the design of

Contextual Info: m 1991 SparKIT Peripheral Chips: L64850, L64851, and L64852 LSI LOGIC Preliminary Introduction This d a ta sh e e t d e scrib e s the L64850, L64851, and L64852, th e p e rip h e ra l chips in the SparKIT-25, SparKIT-33, and SparKIT-40. The L64850 M bu s DRAM C o n tro lle r pro vid es a d ire c t