IS61C416 Search Results
IS61C416 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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61C416
Abstract: IS61C416
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61c41633mhz25mhz20mhz+2 | |
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Contextual Info: ISSI PRELIMINARY 2048-BIT SERIAL ELECTRICALLY ERASABLE PROM WITH 2V READ CAPABILITY FEATURES August 1990 PIN CONFIGURATIONS • State-of-the-Art Architecture — Non-volatile data storage — Single supply - 5V operation — Full TTL compatible inputs and outputs |
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2048-bit733-issi245-issi | |
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Contextual Info: ISSI •T 3T 51 *• > 1 IS 61C816 2 x 4K x 16, 8K X 16 HIGH SPEED CMOS CACHE RAM OCTOBER1990 DESCRIPTION FEATURES • PRELIMINARY The ISSI IS61C816 is fabricated by the double layer polysili con, double layer metal CMOS technolgy. It is specifically designed to provide direct interface to the 80386 32-bit CPU |
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61c81633mhz25mhz20mhz+4 | |
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Contextual Info: ISSI IS93C66 4096-BIT SERIAL ELECTRICALLY ERASABLE PROM WITH 2V READ CAPABILITY FEATURES PRELIMINARY August 1990 PIN CONFIGURATIONS • State-of-the-Art Architecture — Non-volatile data storage — Single supply - 5V operation — Full TTL compatible inputs and outputs |
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is93c664096-bit733-issi245-issi |