IDT72T51433 Search Results

IDT72T51433

Abstract: IDT72T51443 IDT72T51453
Contextual Info: PRELIMINARY IDT72T51433 IDT72T51443 IDT72T51453 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES 16 QUEUES 18 BIT WIDE CONFIGURATION 589,824 bits, 1,179,648 bits and 2,359,296 bits • • • FEATURES: • • • • • • • • • • • • Choose from among the following memory density options:

IDT72T51433

Abstract: IDT72T51443 IDT72T51453
Contextual Info: 2.5V MULTI-QUEUE FIFO 16 QUEUES 18 BIT WIDE CONFIGURATION 589,824 bits, 1,179,648 bits and 2,359,296 bits FEATURES: • • • • • • • • • • • • • • • • Choose from among the following memory density options: IDT72T51433  Total Available Memory = 589,824 bits

Contextual Info: ADVANCE INFORMATION 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES 16 QUEUES 18 BIT WIDE CONFIGURATION 589,824 bits, 1,179,648 bits and 2,359,296 bits • • • FEATURES: • • • • • • • • • • • • Choose from among the following memory density options:

IDT72T51236

Abstract: IDT72T51246 IDT72T51256 IDT72T51336 IDT72T51346 IDT72T51356 IDT72T51436 IDT72T51446 IDT72T51456 IDT72T51546
Contextual Info: IDT 2.5V Multi-Queue Flow-Control Device Errata June 2003 Notes: INTRODUCTION This Device Errata reflects an operating condition necessary to insure queue register integrity in the 2.5V Multi-Queue. This erratum does NOT apply to the 3.3V Multi-Queue or the 2.5V Multi-Queue with DDR I/Os.