IDT7165L Search Results

dfw11

Contextual Info: IDT7165S IDT7165L CMOS STATIC RAM 64K 8K x 8-BIT RESETTABLE RAM NOT RECOMMENDED FOR NEW DESIGNS <’> FEATURES: DESCRIPTION: • High-speed asynchronous RAM clear on Pin 1 (clears all RAM bits to 0, reset cycle time = 2 x tAA) • High-speed address access time

Contextual Info: IDT7165S IDT7165L CMOS STATIC RAM 64K 8K x 8-BIT RESETTABLE RAM NOT RECOMMENDED FOR NEW DESIGNS <’> FEATURES: DESCRIPTION: • High-speed asynchronous RAM clear on Pin 1 (clears all RAM bits to 0, reset cycle time = 2 x tAA) • High-speed address access time

Contextual Info: -•S -M tT td -11- . - INTE SRATED DEVI CE 3 ÛE D m 4 Û S S 771 0 0 0 0 2 7 5 _ fi • IDT - T - V ^ - 7 V l2 _ IDT7165S IDT7165L CMOS STATIC RAM 64K (8K x 8-BIT RESETTABLE RAM NOT RECOMMENDED F O R N E W D E S IG N S «> FEATURES:

idt7165

Abstract: 2979
Contextual Info: IDT7165S IDT7165L CMOS STATIC RAM 64K 8K x 8-BIT RESETTABLE RAM NOT RECOMMENDED F O R N E W D E S IG N S <1> FEATURES: DESCRIPTION: • High-speed asynchronous RAM clear on Pin 1 (clears all RAM bits to 0, reset cycle time = 2 x tM ) • High-speed address access time

IDT7164L25

Abstract: M4821 Mostek IDT7164L20 IDT7164L30 IDT7164L35 IDT7164S20 IDT7164S25 IDT7164S35 IDT7165L-30
Contextual Info: 96 6 4 K x m % tt £ rc TAAC max ns) TCAC max (ns) 4 CMOS + TOE max (ns) TOH min (ns) y TOD nax (ns) y S t a t i c W TWP min (ns) TDS •in (is) R A M (81 9 2 X 8 ) 2 8 P I N A 14 TDH min (ns) TWD ■in (ns) TWR nax (ns) V D D or V C C (V) I DD max (mA)

ry 536

Abstract: SOJ8 l3590
Contextual Info: CMOS STATIC RAM 64K 8K x 8-BIT RESETTABLE RAM IDT 7165S IDT 7165L FEATURES: DESCRIPTION: • H ig h -spe e d a synch ro n ou s RAM clea r o n Pin 1 (clears all RAM b its to 0 , reset c y c le tim e = 2 x tM ) • H ig h -spe e d a ddress a ccess tim e T h e ID T7165 is a hig h -sp ee d 65,536-b it sta tic RAM, organized