HDEC68 Search Results

hlr 3700

Abstract: PDP10
Contextual Info: 10 1-0 HDec68 10. 10.1 - ARITHMETIC PROCESSOR PAGING Introduction BBN is designing an interface between the KA-10 arithmetic processor and core memory which we call the Pager. This device receives from the APR over a standard memory buss execute, read, write, and read-modify-write requests.