HD74HC114 Search Results
HD74HC114 Datasheets (5)
Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
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HD74HC114 | Hitachi Semiconductor | Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock) | Original | 48.76KB | 8 | ||
HD74HC114FP | Hitachi Semiconductor | Flip-Flop, Negative-Edge, JK Flip-Flop, 2-Element, 2-Input, 14-SOP | Original | 40.72KB | 6 | ||
HD74HC114P | Hitachi Semiconductor | Flip-Flop, Negative-Edge, JK Flip-Flop, 2-Element, 2-Input, 14-DIP | Original | 40.72KB | 6 | ||
HD74HC114P |
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Logic Misc, High-Speed CMOS Logic | Original | 350.97KB | 60 | ||
HD74HC114RP | Hitachi Semiconductor | Flip-Flop, Negative-Edge, JK Flip-Flop, 2-Element, 2-Input, 14-SOP | Original | 47.15KB | 8 |
HD74HC114 Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: HD74HC114 # Dual J-K Flip-Flops with Preset, Common Clear, and Common Clock T h u flip-flop it edge sensitive to the clock input and change PIN ARRANGMENT state on the negative transition of the dock pulse. Each flipflop hai independant J, K, and preset inputs and Q and Q |
OCR Scan |
HD74HC114 | |
74HC114Contextual Info: HD74HC114 D u al J-K F lip -F lo p s with Preset, Common Clear, and Common Clock This flip-flop is edge sensitive to the clock input and change PIN ARRANGMENT state on the negative transition of the clock pulse. Each flipflop has independent J, K, and preset inputs and Q and Q |
OCR Scan |
HD74HC114 74HC114 | |
Hitachi DSA00279Contextual Info: HD74HC114 Dual J-K Flip-Flops with Preset, Common Clear and Common Clock Description This flip-flop is edge sensitive to the clock input and change state on the negative transition of the clock pulse. each flip-flop has independent J, K and preset inputs and Q and Q outputs. Two flip-flops |
Original |
HD74HC114 Hitachi DSA00279 | |
DP-14
Abstract: FP-14DA FP-14DN HD74HC114 Hitachi DSA00334
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HD74HC114 DP-14 FP-14DA FP-14DN HD74HC114 Hitachi DSA00334 | |
Contextual Info: HD74HC114 # Dual J-K Fiip-Flops with Preset, Common Clear, and Common Clock PIN ARRANGMENT This flip-flop is edge sensitive to the clock input and change state on the negative transition of the clock pulse. Each flipflop has independent J, K, and preset inputs and Q and Q |
OCR Scan |
HD74HC114 | |
HD74HC114
Abstract: DP-14 FP-14DA Hitachi DSA00221 HD74HC1
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HD74HC114 ADE-205-437 HD74HC114 DP-14 FP-14DA Hitachi DSA00221 HD74HC1 | |
HD74HC114
Abstract: DP-14 FP-14DA
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Original |
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Contextual Info: HITACHI/ LO GI C/ AR R A Y S/ M E N T5 HD 74 HC 114 D E I 4 4 ^ 2 0 3 001D373 7 | “ 92D 10373 # Dual J-K Flip-Flops with Preset, Common Clear, and Common Clock T - % '0 - i - 0 7 This flip -fio p is edge sensitive to the clock input and change PIN ARRANGMENT |
OCR Scan |
001D373 0D1D315 | |
74AC154
Abstract: design octal counter using j-k flipflop HD74HC04 octal counter application octal decoder ic HD74HC259 HD74HC126 HD74HC373
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OCR Scan |
HD74AC HD74HC 74AC154 design octal counter using j-k flipflop HD74HC04 octal counter application octal decoder ic HD74HC259 HD74HC126 HD74HC373 |