FCT138 Search Results

54FCT138DMQB

Contextual Info: FCT138 1-of-8 Decoder/Demultiplexer General Description Features The FCT138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three

A 2631

Abstract: ta2631
Contextual Info:  Integrated Device Technology, Inc. TECHNICAL BRIEF-01 PREVENTING DECODE GLITCHES with the FCT138/139 By Suren Kodical This bulletin describes the timing considerations for avoiding spurious output glitches in FCT138 and 139 decoders. When these decoders are used in microprocessor-based

5 to 32 decoder

Abstract: 54FCT138 54FCT138DMQB 54FCT138FMQB 54FCT138LMQB J138
Contextual Info: MICROCIRCUIT DATA SHEET Original Creation Date: 12/07/98 Last Update Date: 01/12/99 Last Major Revision Date: 01/06/99 FCT138-X REV 2A0 1 of 8 Decoder/Demultiplexer General Description The FCT138 is a high-speed 1-of-8 decoder/ demultiplexer. The device is ideally suited for

T138LM

Contextual Info: Semiconductor FCT138 1-of-8 Decoder/Demultiplexer General Description Features The FCT138 is a high-speed 1-of-8 decoder/dem ultiplexer. This device is ideally suited fo r high-speed bipolar m em ory chip select address decoding. The m ultiple input enables al­

54FCT138

Abstract: 54FCT138DMQB 54FCT138FMQB 54FCT138LMQB E20A J16A W16A
Contextual Info: FCT138 1-of-8 Decoder/Demultiplexer General Description Features The FCT138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three

54FCT138

Abstract: 54FCT138DMQB 54FCT138FMQB 54FCT138LMQB E20A J16A W16A
Contextual Info: FCT138 1-of-8 Decoder/Demultiplexer General Description Features The FCT138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three

FT138-1

Contextual Info: FCT138T, FCT138T 1-OF-8 DECODERS SCCS013B – MAY 1994 – REVISED OCTOBER 2001 D D D D D D D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC O0 O1 O2 O3 O4 O5 O6 FCT138T . . . L PACKAGE TOP VIEW A1 A0 NC VCC O0 D A0 A1 A2 E1 E2 E3 O7 GND A2 E1 NC

Contextual Info: CY54/FCT138T 1-OF-8 DECODER CYPRESS FEATURES • Function, Pinout and Drive Compatible with the FCT and F Logic ■ Power-off disable feature ■ Matched Rise and Fall times ■ FCT-C speed at 5.0ns max. Com'l FCT-A speed at 5.8ns max. (Com'l) ■ Fully Compatible with TTL Input and Output

Contextual Info: FCT138T, FCT138T 1-OF-8 DECODERS SCCS013B – MAY 1994 – REVISED OCTOBER 2001 D D D D D D D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC O0 O1 O2 O3 O4 O5 O6 FCT138T . . . L PACKAGE TOP VIEW A1 A0 NC VCC O0 D A0 A1 A2 E1 E2 E3 O7 GND A2 E1 NC

AMD 22V10

Abstract: EPROM 27256 programmer schematic application PAL 16v8 ip8254 16v8 programming Guide C2503 22v10 pal 0001FFFFH eeprom programmer schematic 27256 EPROM intel 27256
Contextual Info: IDT79R3051 SYSTEM DESIGN EXAMPLE APPLICATION NOTE AN-86 APPLICATION NOTE AN-86 IDT79R3051 SYSTEM DESIGN EXAMPLE Integrated Device Technology, Inc. by Andrew Ng even further. Although the board is not populated with parts that have the highest performance achievable, its design can

Contextual Info: IDT54/FCT138T/AT/CT FAST CMOS 1-OF-8 DECODER WITH ENABLE MILITARY AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS 1-OF-8 DECODER WITH ENABLE IDT54/FCT138T/AT/CT FEATURES: DESCRIPTION: − − − − The IDT54/FCT138T is a 1-of-8 decoder built using an advanced

A115-A

Abstract: C101 CY54FCT138T CY74FCT138T
Contextual Info: FCT138T, FCT138T 1-OF-8 DECODERS SCCS013B – MAY 1994 – REVISED OCTOBER 2001 D D D D D D D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC O0 O1 O2 O3 O4 O5 O6 FCT138T . . . L PACKAGE TOP VIEW A1 A0 NC VCC O0 D A0 A1 A2 E1 E2 E3 O7 GND A2 E1 NC

CY74FCT138ATQCT

Abstract: CY74FCT138CTQCT
Contextual Info: Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. CY54/FCT138T 1-of-8 Decoder SCCS013 - May 1994 - Revised February 2000 Features • Function, pinout, and drive compatible with FCT and F logic

Contextual Info: FCT138T, FCT138T 1-OF-8 DECODERS SCCS013B – MAY 1994 – REVISED OCTOBER 2001 D D D D D D D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC O0 O1 O2 O3 O4 O5 O6 FCT138T . . . L PACKAGE TOP VIEW A1 A0 NC VCC O0 D A0 A1 A2 E1 E2 E3 O7 GND A2 E1 NC

FCT138A

Contextual Info: 138 A 33 ÆM National Semiconductor FCT138A 1-of-8 Decoder/Demultiplexer General Description Features The ’FCT138A is a high-speed 1-of- 8 decoder/demultiplex­ er. This device is ideally suited for high-speed bipolar mem­ ory chip select address decoding. The multiple input en­

ESD 138C

Contextual Info: jUN 15 199t P54/FCT138/A/C P54/74PCT138/A/C HIGH SPEED 1-0F-8 DECODER FEATURES ESD protection exceeds 2000V Function, Pinout, and Drive Compatible with the FCT and F Logic Inputs and Outputs Interface Directly with TTL, NMOS, and CMOS Devices FCT-C speed at 4.7ns max. (Com'l)

circuit diagram of 1-8 demultiplexer design logi

Contextual Info: NATIONAL SEfUCOND CL06IC NSC1 b lE D 138A National Semiconductor FCT138A 1-of-8 Decoder/Demultiplexer General Description Features The ’FCT138A is a high-speed 1-of-8 decoder/demultiplex­ er. This device is ideally suited for high-speed bipolar mem­

ip8254

Abstract: AMD 22V10 Xceive 79r3001 Bf8000 EPROM 27256 programmer schematic IDT79R3051 R3000 R3051 R3052
Contextual Info: IDT79R3051 SYSTEM DESIGN EXAMPLE  APPLICATION NOTE AN-86 APPLICATION NOTE AN-86 IDT79R3051 SYSTEM DESIGN EXAMPLE Integrated Device Technology, Inc. by Andrew Ng even further. Although the board is not populated with parts that have the highest performance achievable, its design can

1 into 12 demultiplexer circuit diagram

Abstract: 54FCT138 54FCT138DMQB 54FCT138FMQB 54FCT138LMQB E20A J16A W16A FCT138
Contextual Info: Semiconductor FCT138 1-of-8 Decoder/Demultiplexer General Description Features The FC T138 is a high-speed 1-of-8 decoder/dem ultiplexer. This device is ideally suited for high-speed bipolar m em ory chip select address decoding. The m ultiple input enables al­

CY74FCT138ATPC

Abstract: CY74FCT138ATQC CY74FCT138CTPC CY74FCT138CTQC CY74FCT138CTSOC
Contextual Info: CY54/FCT138T ¿r C Y P R E S S l-of-8 Decoder Features • M atched rise and fall tim es • Function, pinout, and drive com patible w ith FCT and F logic • Fully com p atib le w ith TTL input and o u tpu t logic levels • FCT-C speed a t 5 .0 n s m ax. C om ’l

Contextual Info: FCT138T, FCT138T 1-OF-8 DECODERS SCCS013B – MAY 1994 – REVISED OCTOBER 2001 D D D D D D D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC O0 O1 O2 O3 O4 O5 O6 FCT138T . . . L PACKAGE TOP VIEW A1 A0 NC VCC O0 D A0 A1 A2 E1 E2 E3 O7 GND A2 E1 NC

E16-1

Contextual Info: FAST CMOS 1-OF-8 DECODER WITH ENABLE Integrated Device Technology, Inc. IDT54/FCT138T/AT/CT FEATURES: DESCRIPTION: • • • • The IDT54/FCT138T/AT/CT are 1-of-8 decoders built using an advanced dual metal CMOS technology. The IDT54/ FCT138T/AT/CT accepts three binary weighted inputs A0,

16k x 8 ram

Abstract: A12LC
Contextual Info: ID T 7M 10 01 /3 D a t a B o o k B, S e c t i o n 8.4, P a g e 1 128K x 8 64K x 8 CMOS DUAL-PORT STATIC RAM MODULE PRELIMINARY IDT7M1001 IDT7M1003 FEATURES DESCRIPTION: • High density 1 M /512K CM OS dual-port static RAM module • Fast access times: — commercial - 25, 30, 35, 40, 50, 65ns

CY54FCT138TDMB

Contextual Info: FCT138T, FCT138T 1-OF-8 DECODERS SCCS013B – MAY 1994 – REVISED OCTOBER 2001 D D D D D D D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC O0 O1 O2 O3 O4 O5 O6 FCT138T . . . L PACKAGE TOP VIEW A1 A0 NC VCC O0 D A0 A1 A2 E1 E2 E3 O7 GND A2 E1 NC