DS3883 Search Results

DS3875

Abstract: DS3883 DS3883A DS3884A DS3885 DS3886A P896
Contextual Info: General Description The DS3883A is one in a series of transceivers designed specifically for the implementation of high performance Futurebus+ and proprietary bus interfaces. The DS3883A, is a BTL 9-bit Transceiver designed to conform to IEEE 1194.1 Backplane Transceiver Logic—BTL as specified in the

DI-650

Abstract: 44-PIN 48-PIN DS3883A DS3883AV DS3883AVB DS3883AVF
Contextual Info: September 1995 Semiconductor DS3883A BTL 9-Bit Data Transceiver General Description Features The DS3883A is one in a series of transceivers designed specifically for the implementation of high performance Futurebus+ and proprietary bus interfaces. The DS3883A, is

A1 GNC

Abstract: A5 GNC
Contextual Info: DS3883A National Semiconductor DS3883A BTL 9-Bit Data Transceiver General Description The DS3883A is one in a series of transceivers designed specifically for the implementation of high performance Futurebus+ and proprietary bus interfaces. The DS3883A, is a

TRANSISTOR C 6090 npn

Abstract: TRANSISTOR C 6090 lg TRANSISTOR C 6090 RRV 751 transistor sot t06 DS3883 DS3883A DS3883AV DS3883AVF DS3884A
Contextual Info: < ß J an u a ry 1 9 9 4 DS3883A BTL 9-Bit Data Transceiver General Description Features The DS3883A is one in a series of transceivers designed specifically for the implementation of high performance Futurebus+ and proprietary bus interfaces. The DS3883A, is

TRANSISTOR C 6090

Abstract: TRANSISTOR C 6090 npn TRANSISTOR C 6090 EQUIVALENT 44-PIN DS3883A DS3883AV DS3883AVF
Contextual Info: DS3883A BTL 9-Bit Data Transceiver General Description Features The DS3883A is one in a series of transceivers designed specifically for the implementation of high performance Futurebus+ and proprietary bus interfaces. The DS3883A, is a BTL 9-bit Transceiver designed to conform to IEEE

Contextual Info: DS3883A Na tio n al Semiconductor DS3883A BTL 9-Bit Data Transceiver General Description Features The DS3883A is one In a series of transceivers designed specifically for the implementation of high performance Futurebus+ and proprietary bus interfaces. The DS3883A, is

Contextual Info: Semiconduc 0r General Description The DS3883A is one in a series of transceivers designed specifically for the implementation of high performance Futurebus+ and proprietary bus interfaces. The DS3883A, is a BTL 9-bit Transceiver designed to conform to IEEE 1194.1

transistor CD 910

Abstract: C1995 DS3875 DS3883 DS3883A DS3883AV DS3884A DS3885 DS3886A 10719 diode
Contextual Info: DS3883A BTL 9-Bit Data Transceiver General Description Features The DS3883A is one in a series of transceivers designed specifically for the implementation of high performance Futurebus a and proprietary bus interfaces The DS3883A is a BTL 9-bit Transceiver designed to conform to IEEE

BS5783

Abstract: marking code GEC
Contextual Info: QC6117 Series DS3883-1.2 September 1993 QC6117 Series 200KHz to 16MHz QUARTZ CRYSTAL OSCILLATORS The QC6117 Series oscillator is a ruggedised simple packaged oscillator designed for space and military applications where radiation hardness is a significant factor in

DS3883

Abstract: DS3883A DS3883AVF VF44B DS010-7
Contextual Info: DS3883A BTL 9-Bit Data Transceiver General Description The DS3883A is one in a series of transceivers designed specifically for the implementation of high performance Futurebus+ and proprietary bus interfaces. The DS3883A, is a BTL 9-bit Transceiver designed to conform to IEEE 1194.1

Contextual Info: DS3883A DS3883A BTL 9-Bit Data Transceiver Literature Number: SNOS560A DS3883A BTL 9-Bit Data Transceiver General Description The DS3883A is one in a series of transceivers designed specifically for the implementation of high performance Futurebus+ and proprietary bus interfaces. The DS3883A, is a

ds3883v

Abstract: DS3805 TRANSISTOR C-111 M 5G
Contextual Info: DS3883 National Æm Semiconductor DS3883 BTL 9-Bit Data Transceiver General Description Features The DS3883 is one in a series of transceivers designed spe­ cifically for the implementation of high performance Futurebus + and proprietary bus interfaces. The DS3883 is a BTL

IEEE1194-1

Abstract: DS3883A IEEE1194 IEEE896 VF44B IEEE-896
Contextual Info: DS3883A BTL 9 ビットデータ・トランシーバ 概要 DS3883A は高性能フューチャーバス＋および独自のバス・インタ フェースを実現するために特別設計された一連のトランシーバのうち の 1 つです。DS3883A は、IEEE896.2（フューチャーバス＋）に規定さ

DS3884AVF

Abstract: DS3886A AN-774 DS3883A DS3884 DS3884A DS3884AV
Contextual Info: General Description The DS3884A is pin to pin and functionally compatible with the DS3884. The DS3884A is a speed and power enhanced version of the DS3884. There are two minor differences between the DS3884 and DS3884A. The external resistor used in the DS3884A is different from

IEEE896

Abstract: DS3883A IEEE1194 VF44B
Contextual Info: ご注意：この日本語データシートは参考資料として提供しており内容が最新でない場合があります。 製品のご検討およびご採用に際しては、必ず最新の英文データシートをご確認ください。

LT 8521

Abstract: 44-PIN DS3884 DS3884A DS3884AV DS3884AVF V44A VF44B 114602 7bT43
Contextual Info: July 1995 Semicondu t o r DS3884A BTL Handshake Transceiver • Meets 1194.1 Standard on Backplane Transceiver Log­ ic BTL ■ Supports live insertion ■ Glitch free power-up/down protection ■ Typically less than 5 pF bus-port capacitance ■ Low Bus-port voltage swing (typically 1V) at 80 mA

DS3875

Abstract: DS3883 DS3885 DS3885V DS3885VF V44A VF44B
Contextual Info: DS3885 National f t ! Semiconductor DS3885 BTL Arbitration Transceiver General Description Features The DS38B5 is one in a series of transceivers designed spe­ cifically for the implementation of high performance Futurebus+ and proprietary bus interfaces. The DS3885 Arbitra­

AN-839

Abstract: DS3883A DS3884A DS3885 DS3886A
Contextual Info: National Semiconductor Application Note 839 Joel Martinez, Stephen Kempainen July 1992 INTRODUCTION Futurebus+ systems designed today have bus widths of 32 or 64. To support higher bandwidths in the future, Futurebus+ provides a data width extension of up to 256 bits. BTL

case transistor 79A

Abstract: tel 839 b AN-839 C1996 DS3883A DS3884A DS3885 DS3886A
Contextual Info: National Semiconductor Application Note 839 Joel Martinez Stephen Kempainen July 1992 INTRODUCTION Futurebus a systems designed today have bus widths of 32 or 64 To support higher bandwidths in the future Futurebus a provides a data width extension of up to 256 bits BTL

VARIABLE POWER SUPPLY. 0 - 30V, LM723

Abstract: LM741 audio amplifiers IC LM741 timer circuit diagram lm35 sensor interfacing with adc0808 diagram LM338 TO-3 spice model LM741 AND LM386 Audio Amplifier lm1485 LM1084 spice LF351 op-amp audio equalizer smd code marking 162 sot23-5
Contextual Info: Welcome to National Semiconductor’s Summer 2000 Edition of the Linear/Mixed-Signal Designer’s Guide! Included in this guide are: • • • • • Alphanumeric index Product selection trees Product selection guides Package descriptions CD-ROM with complete datasheets, a pdf version of this guide, and other valuable information

FAST applications Handbook

Abstract: 11A72 AN-738 DS3883 ZO 126 Tektronix handbook bicc-vero national application handbook
Contextual Info: National Semiconductor Application Note 738 Stephen Kempainen January 1991 フューチャーバス＋バックプレーンは多くの回路要素からなる複 雑な電気的環境です。このような環境をモデル化するには時間とコス

AN-839

Abstract: DS3883A DS3884A DS3885 DS3886A
Contextual Info: National Semiconductor Application Note 839 Joel Martinez, Stephen Kempainen July 1992 INTRODUCTION Futurebus+ systems designed today have bus widths of 32 or 64. To support higher bandwidths in the future, Futurebus+ provides a data width extension of up to 256 bits. BTL

Contextual Info: + Semiconductor BTL H a n d s h a k e Transceiver Separate ground pins are provided for each BTL output to minimize induced ground noise during simultaneous switch­ ing. The device’s unique driver circuitry meets a maximum slew rate of 0.5V/ns which allows controlled rise and fall times to

MES 60 BZ

Abstract: cn/A/U 237 BG
Contextual Info: r, i S e m i c o n d u c t o r November 1995 DS3875 Futurebus+ Arbitration Controller General Description The DS3875 Futurebus+ Arbitration Controller is a member of National Semiconductor’s Futurebus+ chip set designed specifically for the IEEE 896.1 Futurebus+ standard. The