DS2175 Search Results

DS2175

Abstract: DS2175N DS2175S DS2180A DS2181A HC595
Contextual Info: DS 2175 DALLAS SEMICONDUCTOR FEATURES DS2175 T1/CEPT Elastic Store PIN ASSIGNMENT • Rate buffer for T1 and C E PT transm ission system s • Synchronizes lo o p -tim e d and system tim ed data stream s on fram e boundaries • Ideal forT1 1.544 MHz to CEPT (2.048 MHz), CEPT

DS2175

Abstract: DS2175N DS2175S DS2180A DS2181A HC595
Contextual Info: DS2175 T1/CEPT Elastic Store www.dalsemi.com FEATURES • • • • • • • • PIN ASSIGNMENT Rate buffer for T1 and CEPT transmission systems Synchronizes loop–timed and system timed data streams on frame boundaries Ideal for T1 1.544 MHz to CEPT (2.048

Contextual Info: DS2175 T1/CEPT Elastic Store www.dalsemi.com FEATURES • • • • • • • • PIN ASSIGNMENT Rate buffer for T1 and CEPT transmission systems Synchronizes loop–timed and system timed data streams on frame boundaries Ideal for T1 1.544 MHz to CEPT (2.048

Contextual Info: rjA I 1 A Q Bmmomnjctm FEATURES • DS2175 T1/CEPT Elastic Store PIN ASSIGNMENT Rate buffer for T1 and CEPT transmission systems Synchronizes loop-timed and system timed data streams on frame boundaries Ideal for T1 1.544 MHz to CEPT (2.048 MHz), CEPT to T1 interfaces

DS2180A

Abstract: DS2175 DS2181A DS2186 DS2187 DS2280 DS2281 DS2281-075 DS2281-120 2BL4
Contextual Info: DS2280/DS2281 DS2280/DS2281 DALLAS SEMICONDUCTOR T 1 Line Card Stik C E P T Line Card Stik FEATURES PIN ASSIGNMENT • Pretested, snap-in T1 or CEPT line card DS2280 DS2281-075 DS2281-120 o T1 Line Card 75 ohm CEPT Line Card 120 ohm CEPT Line Card DS2175 ID

DS2175

Contextual Info: RELIABILITY MONITOR PRODUCT MONITOR DATE DATE CODE ASSEMBLY FACILITY ASSEMBLY LOT NO PROCESS TYPE PACKAGE TYPE DS2175 Jul-97 9712 D1 ANAM, K. DN702069AAJ 2.0µ OXIDE 16 SOIC STRESS/JOB NO. READPOINT Sample Size/No. of Fails Preconditioning (P/C): T/C: -55°C to +125°C, 10~

Contextual Info: DALLAS SEMICONDUCTOR DS2175 T1/CEPT Elastic Store FEATURES PIN ASSIGNMENT • Rate buffer for T 1 and CEPT transm ission system s • Synchronizes loop-tim ed and system tim ed data stream s on fram e boundaries • Ideal for T1 1.544 MHz to CEPT (2.048 MHz), CEPT

Contextual Info: DALLAS SEMICONDUCTOR FEATURES DS2175 T1/CEPT Elastic Store PIN ASSIGNMENT • Rate buffer for T 1 and CEPT transmission systems R C L K S E lC • Synchronizes loop-timed and system timed data streams on frame boundaries • Ideal for T1 <1.544 MHz to CEPT 2.048 MHz), CEPT

DS2175

Abstract: DS2175N DS2175S DS2180A DS2181A HC595
Contextual Info: DS2175 DS2175 T1/CEPT Elastic Store FEATURES PIN ASSIGNMENT • Rate buffer for T1 and CEPT transmission systems • Synchronizes loop–timed and system timed data streams on frame boundaries • Ideal for T1 1.544 MHz to CEPT (2.048 MHz), CEPT to T1 interfaces

Contextual Info: rjA I 1 A Q Bmmomnjctm FEATURES • DS2175 T1/CEPT Elastic Store PIN ASSIGNMENT Rate buffer for T1 and CEPT transmission systems Synchronizes loop-timed and system timed data streams on frame boundaries Ideal for T1 1.544 MHz to CEPT (2.048 MHz), CEPT to T1 interfaces

DS2175

Abstract: DS2175N DS2175S DS2180A DS2181A HC595
Contextual Info: DS2175 DS2175 T1/CEPT Elastic Store FEATURES PIN ASSIGNMENT • Rate buffer for T1 and CEPT transmission systems • Synchronizes loop–timed and system timed data streams on frame boundaries • Ideal for T1 1.544 MHz to CEPT (2.048 MHz), CEPT to T1 interfaces

Contextual Info: D S2175 FULL DATA SH EET AVAILABLE - C A LL 214-450-3836 PA LLAS DS2175 T1/CEPT Elastic Store SEMICONDUCTOR PIN ASSIGNMENT FEATURES • Rate buffer for T 1 and C E P T transmission systems • Synchronizes loop-timed and system-timed data streams on frame boundaries

19012

Contextual Info: RELIABILITY MONITOR PRODUCT MONITOR DATE DATE CODE ASSEMBLY FACILITY ASSEMBLY LOT NO PROCESS TYPE PACKAGE TYPE DS2175 Jan-97 9643 D1 ANAM, K. DN634667AAA1 2.0µ OXIDE 16 SOIC STRESS/JOB NO. READPOINT Sample Size/No. of Fails Preconditioning (P/C): T/C: -55°C to +125°C, 10~

RS-449

Abstract: 530 transistor DS2151 DS2153 DS2175
Contextual Info: DS2141A/43/51/53 Application Note PCM Interface, Interfacing to Fractional T1 and E1 June 22, 1994 DS2175 Reset RMSYNC SFSYNC ALN S/P RCLKSEL SCLKSEL DS2141A/43/51/53 RSER RCHBLK RNEG RPOS RCLK TCLK TPOS TNEG RSYNC TSYNC RSER SSER RCLK SYSCLK Clock Smoothing

Contextual Info: DALLAS SEMICONDUCTOR DS2175 T1/CEPT Elastic Store PIN ASSIGNMENT FEATURES • Rate buffer for T1 and CEPT transmission systems RCLKSEL C • Synchronizes loop-timed and system timed data streams on frame boundaries • Ideal for T1 1.544 MHz to CEPT (2.048 MHz), CEPT

Contextual Info: DALLAS s e m ic o n d u c to r FEATURES DS2175 T1/CEPT Elastic Store PIN ASSIGNM ENT • Rate buffer for T1 and CEPT transm ission systems • Synchronizes lo o p -tim e d and system tim ed data stream s on fram e boundaries • Ideal forT1 1.544 MHz to CEPT (2.048 MHz), CEPT

Contextual Info: DS2175 DALLAS SEMICONDUCTOR DS2175 T 1/C E P T Elastic Store PIN ASSIGNMENT FEATURES • Rate buffer for T1 and CEPT transmission systems • Synchronizes loop-timed and system timed data streams on frame boundaries • Supports parallel and serial backplanes

Contextual Info: RELIABILITY MONITOR JOB PRODUCT DESCRIPTION FA NO UNIT TEST MODE FAIL MECHANISM P18923 DS12887 BIASED MOISTURE 970059 P18949 DS2175S I/L, 48HR BIASED 970027 P19043 DS5000T TEMP CYCLE 970156 P19044 DS5000T MOISTURE SOAK 970181 P19112 DS1868E I/L, 48HR BIASED

Contextual Info: Standard Product August 1992 LXP2175 T1/E1 Elastic Store • Drop-in replacement for the DS2175 The LXP2175 is one of a family of Level One Primary Rate Interface solutions. It is compatible with LXT30x series transceivers, and LXP2180A/2181A framer/formatters.

Contextual Info: DALLAS SEMICONDUCTOR FEATURES DS2175 T1/CEPT Elastic Store PIN ASSIGNMENT • Rate buffer for T1 and C EPT transmission systems • Synchronizes lo o p -tim ed and system timed data streams on frame boundaries • Ideal for T1 1 .5 4 4 M H z to C E P T (2.0 4 8 M H z),C E P T

Contextual Info: RELIABILITY MONITOR PRODUCT MONITOR DATE DATE CODE ASSEMBLY FACILITY ASSEMBLY LOT NO PROCESS TYPE PACKAGE TYPE DS2175 Jan-97 9643 D1 ANAM, K. DN634667AAA1 2.0µ OXIDE 16 SOIC STRESS/JOB NO. READPOINT Sample Size/No. of Fails Preconditioning (P/C): T/C: -55°C to +125°C, 10~

624C

Abstract: DS1204U DS1205S DS1228S DS1640
Contextual Info: DALLAS SEMICONDUCTOR DS1205S M ultiKey Chip FEATURES PIN ASSIGNMENT • T h re e s e c u re re a d /w rite d a ta p a rtitio n s o f 3 8 4 bits VCCI la s e r e tc h e d 15 3 14 m DQ o n 4 13 ~ n n GND 5 12 CLK QC 6 11 ~n~i d q o e MC Q j- 7 10 m GND m~ NC

Contextual Info: DS2180A DALLAS SEMICONDUCTOR DS2180A T1 Transceiver FEATURES PIN ASSIG NM ENT • Single chip DS1 rate transceiver TMSYNC [ • Supports common framing standards - 12 frames/superframe “193S” - 24 frames/superframe “193E” 1 w 39 ] RLOS TCLK [ 3 TCHCLK [ 4

1252SX

Abstract: 1252SX 8 Pin G42-88 MCP1252 MCP1252-33X50 MCP1252-ADJ MCP1253 MCP1253-33X50 MCP1253-ADJ buck converter with dsPIC
Contextual Info: M MCP1252/3 Low Noise, Positive-Regulated Charge Pump Features Description • Inductorless, Buck/Boost, DC/DC Converter • Low Power: 80 µA Typical • High Output Voltage Accuracy: - ±2.5% (VOUT Fixed) • 120 mA Output Current • Wide Operating Temperature Range: