DM74ALS13 Search Results

DM74ALS138

Abstract: FAIRCHILD Y5 ALS138 DM74ALS138M DM74ALS138N DM74ALS138SJ M16A M16D N16A
Contextual Info: DM74ALS138 3 to 8 Line Decoder/Demultiplexer General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be

DM74ALS133M

Abstract: DM74ALS DM74ALS133N J16A M16A N16A
Contextual Info: DM54ALS133/DM74ALS133 13-Input NAND Gate General Description Advanced oxide-isolated, ion-implanted Schottky TTL process Functionally and pin for pin compatible with Schottky and low power Schottky TTL counterpart Improved AC performance over Schottky and low pow­

gl 386

Abstract: DM74ALS DM74ALS137 DM74ALS137M DM74ALS137N M16A N16A Y515
Contextual Info: EM ICDNDUCTOR t DM74ALS137 3 to 8 Line Decoder/Demultiplexer with Address Latches General Description Features The ALS 137 is a three line to eight line decoder/ dem ultiplexer with latches on the three address inputs. When the latch-enable input GL is low, the ALS 137 acts as

Contextual Info: i/W \ National Æj Semiconductor DM74ALS131 3 to 8 Line Decoder/Demultiplexer with Address Register General Description Features The ALS131 is a three-line to eight-line decoder/demulti­ plexer with registers on the three address inputs. When the clock transitions from low to high, the address present at

Contextual Info: CM CO National Semiconductor DM74ALS132 Quad 2-Input NAND Gate with Schmitt Trigger Inputs General Description Features This device contains four independent gates, each of which performs the logic NAND function. Each input has hystere­ sis which increases the noise immunity and transforms a

Contextual Info: December 1990 DM74ALS13 Dual 4-Input NAND Gate with Schmitt Trigger Inputs High input noise immunity Switching specification at 50 pF Switching specifications guaranteed over full tempera­ ture and VCc range Advanced oxide-isolated, ion-implanted Schottky TTL

Contextual Info: i g n National /2 /æ Semiconductor Æ iÆ Corporation PRELIMINARY DM54ALS136/DM74ALS136 Quad 2-lnput Exclusive-OR Gates with Open-Collector Outputs General Description Features This device contains four independent gates, each of which performs the logic exclusive-OR function. The open-coilector outputs require external pull-up resistors for proper logi­

Contextual Info: National ÆÜASemiconductor DM74ALS13 Dual 4-Input NAND Gate with Schmitt Trigger Inputs General Description • Switching specifications guaranteed over full tempera­ ture and V cc range ■ Advanced oxide-isolated, ion-implanted Schottky TTL process ■ Functionally and pin-for-pin compatible with Schottky

Contextual Info: August 1995 Semiconductor DM74ALS138 3 to 8 Line Decoder/Demultiplexer General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing appli­ cations, requiring very short propagation delay times. In

Contextual Info: R C H II- D S E M IC O N D U C T O R tm DM74ALS138 3 to 8 Line Decoder/Demultiplexer General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applica­ tions, requiring very short propagation delay times. In

DM74ALS

Abstract: DM74ALS132 DM74ALS132M DM74ALS132N M14A N14A
Contextual Info: ÄPg fi ;q Ss- December 1990 DM74ALS132 Quad 2-Input NAND Gate with Schmitt Trigger Inputs Switching specification at 50 pF Switching specifications guaranteed over full tempera­ ture and V cc range Advanced oxide-isolated, ion-implanted Schottky TTL process

MJE I 3004

Abstract: DM74ALS132 DM74ALS132M DM74ALS132N M14A N14A fet 3004
Contextual Info: ÎP iï g # 5î December 1990 DM74ALS132 Quad 2-Input NAND Gate with Schmitt Trigger Inputs Switching specification at 50 pF Switching specifications guaranteed over full tempera­ ture and Vqc range Advanced oxide-isolated, ion-implanted Schottky TTL process

DM74ALS133

Abstract: N16A C1995 DM74ALS DM74ALS133M DM74ALS133N M16A
Contextual Info: DM74ALS133 13-Input NAND Gate Y General Description This device contains a single gate which performs the logic NAND function Y Features Y Y Y Switching specifications at 50 pF Switching specifications guaranteed over full temperature and VCC range Advanced oxide-isolated ion-implanted Schottky TTL

ALS138

Abstract: C1995 DM74ALS138 DM74ALS138M DM74ALS138N DM74ALS138SJ M16A M16D N16A DM74ALS138M national
Contextual Info: DM74ALS138 3 to 8 Line Decoder Demultiplexer General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times In high-performance memory systems these decoders can be

DM54ALS138J

Contextual Info: 00 co O T National KA Semiconductor DM54ALS138/DM74ALS138 3 to 8 Line Decoder/Demultiplexer General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing appli­ cations, requiring very short propagation delay times. In

Contextual Info: co co ZWA National £ m Semiconductor DM74ALS133 13-Input NAND Gate Advanced oxide-isolated, ion-implanted Schottky TTL process Functionally and pin for pin compatible with Schottky and low power Schottky TTL counterpart Improved AC performance over Schottky and low pow­

DM54ALS137J

Abstract: DM74ALS DM74ALS137M DM74ALS137N J16A M16A N16A
Contextual Info: DM54ALS137/DM74ALS137 3 to 8 Line Decoder/Demultiplexer with Address Latches General Description Features The ALS137 is a three line to eight line decoder/demulti­ plexer with latches on the three address inputs. When the latch-enable input 3L is low, the ALS137 acts as a decod­

Contextual Info: NATIONAL SEUICOND {LOGIC} IDE D | b S D l i a S 001313475 7 | D £ Uì R K | National Semiconductor d M i Corporation > s> CO CO DM54ALS133/DM74ALS133 13-Input NAND Gate •v. O !> Advanced oxide-isolated, ion-implanted Schottky TTL process Functionally and pin for pin compatible with Schottky

DM74ALS133

Abstract: DM74ALS DM74ALS133M DM74ALS133N M16A N16A
Contextual Info: DM74ALS133 13-Input NAND Gate General Description This device contains a single gate, which performs the logic NAND function. Features n Advanced oxide-isolated, ion-implanted Schottky TTL process n Functionally and pin for pin compatible with Schottky and low power Schottky TTL counterpart

Contextual Info: & December 1989 DM74ALS137 3 to 8 Line Decoder/Demultiplexer with Address Latches General Description Features The ALS137 is a three line to eight line decoder/demulti­ plexer with latches on the three address inputs. When the latch-enable input GL is low, the ALS137 acts as a decod­

DM74ALS137

Abstract: DM74ALS DM74ALS137M DM74ALS137N M16A N16A ALS137
Contextual Info: DM74ALS137 3 to 8 Line Decoder/Demultiplexer with Address Latches General Description Features The ALS137 is a three line to eight line decoder/ demultiplexer with latches on the three address inputs. When the latch-enable input GL is low, the ALS137 acts as

Demultiplexer IC

Contextual Info: R C H I I - P S E M IC O N D U C T O R tm DM74ALS138 3 to 8 Line Decoder/Demultiplexer General Description These S chottky-clam ped circuits are designed to be used in high-perform ance m em ory-decoding o r data-routing a pplica­ tions, requiring very short propagation delay tim es. In

DM54ALS132J

Abstract: DM74ALS DM74ALS132M DM74ALS132N J14A M14A N14A
Contextual Info: Corporation DM54ALS132/DM74ALS132 Quad 2-Input NAND Gates with Schmitt Trigger Inputs General Description Features This device contains four independent gates, each of which performs the logic NAND function. Each input has hystere­ sis which increases the noise immunity and transforms a

DM54ALS131J

Abstract: DM74ALS DM74ALS131M DM74ALS131N J16A M16A N16A
Contextual Info: DM54ALS131/DM74ALS131 National Semiconductor Corporation DM54ALS131/DM74ALS131 3 to 8 Line Decoder/Demultiplexer with Address Register General Description Features The ALS131 is a three-line to eight-line decoder/demulti­ plexer with registers on the three address inputs. When the