DM54LS469 Search Results

ls469

Abstract: DM54LS469 DM54LS469J DM74LS469 DM74LS469J DM74LS469N J24F N24C C1995 L8333
Contextual Info: DM54LS469 DM74LS469 8-Bit Up Down Counter General Description The ‘LS469 is an 8-bit synchronous up down counter with parallel load and hold capability Three function-select inputs LD UD CBI provide one of four operations which occur synchronously on the rising edge of the clock (CK)

10223

Abstract: DM54LS469A DM54LS469AJ DM74LS469A DM74LS469AJ DM74LS469AN DM74LS469AV J24F N24C V28A
Contextual Info: DM54LS469A DM74LS469A 8-Bit Up Down Counter General Description The ’LS469A is an 8-bit synchronous up down counter with parallel load and hold capability Three function-select inputs LD UD CBI provide one of four operations which occur synchronously on the rising edge of the clock (CK)

ls469

Abstract: cbl01
Contextual Info: LS469 CT| National Semiconductor DM54LS469/DM74LS469 8-Bit Up/Down Counter General Description The ‘LS469 is an 8 -bit synchronous up/down counter with parallel load and hold capability. Three function-select in­ puts LD, UD, CBl provide one of four operations which

Contextual Info: LS469 5 2 National Semiconductor DM54LS469/DM74LS469 8-Bit Up/Down Counter General Description The output register Q7 - Q 0 is enabled when OE is LOW, and disabled (Hl-Z) when OE is HIGH. The output drivers will sink the 24 mA required for many bus-interface stan­

Contextual Info: LS469A National Semiconductor DM54LS469A/DM74LS469A 8-Bit Up/Down Counter General Description The 'LS469A is an 8-bit synchronous up/down counter with parallel load and hold capability. Three function-select in­ puts LD, UD, CBI provide one of four operations which

J24F

Abstract: LS469 N24C DM54LS469J DM74LS469 DM74LS469J DM74LS469N *LS469
Contextual Info: DM74LS469 8-Bit Up/Down Counter General Description The ’LS469 is an 8-bit synchronous up/down counter with parallel load and hold capability. Three function-select inputs LD, UD, CBI provide one of four operations which occur synchronously on the rising edge of the clock (CK).

DM54LS469AJ

Abstract: DM74LS469A DM74LS469AJ DM74LS469AN DM74LS469AV J24F N24C V28A LS469A
Contextual Info: DM74LS469A 8-Bit Up/Down Counter General Description The ’LS469A is an 8-bit synchronous up/down counter with parallel load and hold capability. Three function-select inputs LD, UD, CBI provide one of four operations which occur synchronously on the rising edge of the clock (CK).

Contextual Info: July 1989 Semiconductor & DM54LS461A/DM74LS461A Octal Counter General Description The LS461A is an 8-bit synchronous co un ter w ith parallel load, clea r and hold capability. T w o fun ctio n se le ct inputs 10, 11 provide one o f fo u r ope ra tio ns w hich occur synchro­

Contextual Info: EM ICONDUCTQ R t DM74LS469 8-Bit Up/Down Counter General Description The ’ LS469 is an 8-bit synchronous up/down counter with parallel load a nd hold capability. Three fu n ctio n-se lect inputs LD, UD, CBI provide one of fo u r operations w hich occur

Contextual Info: S E M IC O N D U C T O R tm DM74LS469 8-Bit Up/Down Counter General Description The ’LS469 is an 8-bit synchronous up/down counter with parallel load and hold capability. Three function-select inputs LD, UD, CBI provide one of four operations which occur

ls469

Abstract: DM54LS469J DM74LS469 DM74LS469J DM74LS469N J24F N24C UT0e
Contextual Info: E M IC D N D U C T O R t DM74LS469 8-Bit Up/Down Counter General Description The ’LS469 is an 8-bit synchronous up/down counter with parallel load a nd hold capability. Three function-select inputs LD, UD, CBI provide one of fo u r operations w hich occur

DM54LS469AJ

Abstract: DM74LS469A DM74LS469AJ DM74LS469AN DM74LS469AV J24F N24C V28A
Contextual Info: S E M IC O N D U C T O R tm DM74LS469A 8-Bit Up/Down Counter General Description The output register Q7-Q0 is enabled when OE is LOW, and disabled (H l-Z ) when OE is HIGH. The output drivers will sink the 24 mA required for many bus-interface stan­ dards. Two or more ’LS469A octal up/down counters may be

Contextual Info: S E M IC O N D U C T O R tm DM74LS469A 8-Bit Up/Down Counter General Description The output register Q7-Q0 is enabled when OE is LOW, and disabled (H l-Z ) when OE is HIGH. The output drivers will sink the 24 mA required for many bus-interface stan­ dards. Two or more ’LS469A octal up/down counters may be

DM54LS461A

Abstract: DM54LS461AJ DM74LS461A DM74LS461AJ DM74LS461AN DM74LS461AV J24F N24C V28A 2903v
Contextual Info: DM54LS461A DM74LS461A Octal Counter General Description Two or more LS461A octal counters may be cascaded to provide larger counters The operation codes were chosen such that when I1 is HIGH I0 may be used to select between LOAD and INCREMENT as in a program counter