CY2309 Search Results

CY2305

Abstract: CY2308 CY2309
Contextual Info: fax id: 3614 CY2305 and CY2309 as PCI and SDRAM Buffers Introduction to Cypress Zero Delay Buffers What is a Zero Delay Buffer? A zero delay buffer is a device that can fan out 1 clock signal into multiple clock signals with zero delay and very low skew between the outputs. This device is well suited as a buffer for

Contextual Info: CYPRESS CY2309NZ Nine Output, 3.3V SDRAM Buffer for 2 DIMMs or 4 SO-DIMMs Features Functional Description • One input to nine output buffer/driver • Supports two SDRAM DIMMs or four SO-DIMMs with one additional output for feedback to an external or chipset PLL

Contextual Info: CY2305 CY2309 PRELIMINARY CYPRESS Low-Cost 3.3V Zero Delay Buffer for PC and SDRAM ules and is available in a 16-pin SOIC package. The CY2305 is an 8-pin version of the CY2309. It accepts one reference input, and drives out five skew-controlled clocks. Both parts

CY2305SZC-1H

Abstract: CY2305 CY2309 CY2309SC-1
Contextual Info: CY2305 CY2309 Low-cost 3.3V Zero Delay Buffer Features • 10-MHz to 100-/133-MHz operating range, compatible with CPU and PCI bus frequencies up to 100-/133-MHz frequencies, and have higher drive than the -1 devices. All parts have on-chip PLLs which lock to an

CY2309NZ

Abstract: CY2309NZSXI-1H CY2309NZSXI-1HT SZ16
Contextual Info: CY2309NZ Nine-Output 3.3V Buffer Features Functional Description • One-input to nine-output buffer/driver ■ Supports two DIMMs or four SO-DIMMs with one additional output for feedback to an external or chipset PLL ■ Low power consumption for mobile applications

5VOLT

Abstract: CY2305 CY2309 CY2308
Contextual Info: CY2305 and CY2309 as PCI and SDRAM Buffers Introduction to Cypress Zero Delay Buffers What is a Zero Delay Buffer? A zero delay buffer is a device that can fan out 1 clock signal into multiple clock signals with zero delay and very low skew between the outputs. This device is well suited as a buffer for

Contextual Info: CY2305 CY2309 Low-Cost 3.3V Zero Delay Buffer Features • 10-MHz to 100-/133-MHz operating range, compatible with CPU and PCI bus frequencies • Zero input-output propagation delay • 60 ps typical cycle-to-cycle jitter high drive • Multiple low-skew outputs

CY2309NZ

Abstract: CY2309NZSI-1H
Contextual Info: CY2309NZ CY2309NZ Nine Output, 3.3V Buffer Features Functional Description • One input to nine output buffer/driver • Supports two DIMMs or four SO-DIMMs with one additional output for feedback to an external or chipset PLL • Low power consumption for mobile applications

CY2309ZC-1H

Abstract: CY2305 CY2309 CY2309SC-1 CY2305SC-1T CY2309SI-1T
Contextual Info: CY2305 CY2309 Low-cost 3.3V Zero Delay Buffer Features • 10-MHz to 100-/133-MHz operating range, compatible with CPU and PCI bus frequencies • Zero input-output propagation delay up to 100-/133-MHz frequencies, and have higher drive than the -1 devices. All parts have on-chip PLLs which lock to an

CY2309

Contextual Info: CY2309A Nine-Output, 200-MHz Zero Delay Buffer Features • 50-MHz to 200-MHz operating range • 650-ps max. Total Timing Budget TTB™ window • Nine low-skew outputs, grouped as 4 + 4 + 1 — Output-output Skew < 200 ps • • • • • • •

CY2305

Abstract: CY2309 CY2309SC-1
Contextual Info: CY2305 CY2309 Low-cost 3.3V Zero Delay Buffer Features • 10-MHz to 100-/133-MHz operating range, compatible with CPU and PCI bus frequencies • Zero input-output propagation delay • Multiple low-skew outputs — Output-output skew less than 250 ps — Device-device skew less than 700 ps

2309C

Contextual Info: CY2305C CY2309C 3.3 V Zero Delay Clock Buffer 3.3 V Zero Delay Clock Buffer Features skew clocks. The -1H versions of each device operate up to 100–133 MHz frequencies and have higher drive than the -1 devices. All parts have on-chip phase locked loops PLLs which

CY2309NZ

Abstract: CY2309NZSI-1H CY2309NZSI-1HT CY2309NZSXI-1H CY2309NZSXI-1HT SZ16
Contextual Info: CY2309NZ Nine-Output 3.3V Buffer Features Functional Description • One-input to nine-output buffer/driver • Supports two DIMMs or four SO-DIMMs with one additional output for feedback to an external or chipset PLL • Low power consumption for mobile applications

CY2305SXC-1

Abstract: CY2305ESXC-1 CY2309SXC-1H CY2309SXC-1T CY2305 CY2305SC-1 CY2309 CY2305E
Contextual Info: CY2305 CY2309 Low-Cost 3.3V Zero Delay Buffer Features Functional Description • 10 MHz to 100-/133 MHz operating range, compatible with CPU and PCI bus frequencies ■ Zero input-output propagation delay ■ 60 ps typical cycle-to-cycle jitter high drive

CY2305SI-IH

Abstract: CY2305-1 CY2305 CY2309 CY2309SC-1
Contextual Info: 9 CY2305 CY2309 Low-Cost 3.3V Zero Delay Buffer Features • 10-MHz to 100-/133-MHz operating range, compatible with CPU and PCI bus frequencies • Zero input-output propagation delay • Multiple low-skew outputs — Output-output skew less than 250 ps — Device-device skew less than 700 ps

Contextual Info: CY2305 CY2309 Low-cost 3.3V Zero Delay Buffer Features • 10-MHz to 100-/133-MHz operating range, compatible with CPU and PCI bus frequencies up to 100-/133-MHz frequencies, and have higher drive than the -1 devices. All parts have on-chip PLLs which lock to an

Contextual Info: CY2309NZ Nine-Output 3.3 V Buffer Functional Description Features • One-input to nine-output buffer/driver ■ Supports two DIMMs or four SO-DIMMs with one additional output for feedback to an external or chipset phase-locked loop PLL ■ Low power consumption for mobile applications

Contextual Info: fax id: 3562 PRELIMINARY CY2309NZ Nine Output, 3.3V SDRAM Buffer for 2 DIMMs or 4 SO-DIMMs Features Functional Description • One input to nine output buffer/driver • Supports two SDRAM DIMMs or four SO-DIM Ms with one additional output for feedback to an external or

CY2304

Abstract: CY2308
Contextual Info: Cypress Semiconductor Product Qualification Report QTP# 98204 VERSION 2.0 October, 2000 Zero Delay Buffer, 3.3V L28 Technology, Fab 2 CY2305/CY2309 10-MHz to 100/133-MHZ CY2304/CY2308 10-MHz to 133-MHZ CYPRESS TECHNICAL CONTACT FOR QUALIFICATION DATA: Ed Russell

CY2305E

Abstract: CY2305ESXC-1 CY2305C
Contextual Info: CY2305, CY2309 Low Cost 3.3-V Zero Delay Buffer Features Functional Description • 10 MHz to 100/133 MHz operating range, compatible with CPU and PCI bus frequencies ■ Zero input-output propagation delay ■ 60-ps typical cycle-to-cycle jitter high drive

CY2305E

Contextual Info: CY2305 CY2309 Low-Cost 3.3V Zero Delay Buffer Features Functional Description • 10 MHz to 100-/133 MHz operating range, compatible with CPU and PCI bus frequencies ■ Zero input-output propagation delay ■ 60 ps typical cycle-to-cycle jitter high drive

mobile MOTHERBOARD CIRCUIT diagram

Abstract: pentium MOTHERBOARD CIRCUIT diagram CY2283 motherboard pentium 1 PC MOTHERBOARD CIRCUIT diagram full CY2281 CY2309NZ
Contextual Info: CY2309NZ Nine Output, 3.3V SDRAM Buffer for 2 DIMMs or 4 SO-DIMMs Features Functional Description • One input to nine output buffer/driver The CY2309NZ is a low-cost SDRAM buffer designed to distribute high speed clocks in mobile PC systems, desktop PC systems with SDRAM support. The part has nine outputs,

23096

Abstract: CY2305 CY2305SC CY2309
Contextual Info: fax id: 3527 1CY 230 9 CY2305 CY2309 Low-Cost 3.3V Zero Delay Buffer for PC and SDRAM Features ules and is available in a 16-pin SOIC package. The CY2305 is an 8-pin version of the CY2309. It accepts one reference input, and drives out five low skew clocks. Both parts have

CY2309NZ

Abstract: CY2309NZSC-1H CY2309NZSC-1HT CY2309NZSXC-1H CY2309NZSXC-1HT CY2309NZSXI-1H CY2309NZSXI-1HT
Contextual Info: CY2309NZ Nine-Output 3.3 V Buffer Features Functional Description • One-input to nine-output buffer/driver ■ Supports two DIMMs or four SO-DIMMs with one additional output for feedback to an external or chipset phase-locked loop PLL ■ Low power consumption for mobile applications