CLKOUT11 Search Results

LMK04828BISQE

Abstract: LMK04828B
Contextual Info: LMK04826B, LMK04828B www.ti.com SNAS605 AP – MARCH 2013 – REVISED JUNE 2013 LMK0482xB Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04826B, LMK04828B 1 INTRODUCTION 1.1 Features 12 • JEDEC JESD204B Support

DMO11

Abstract: DMO10 0X00 GR-253 GR-499-CORE XRT73R12 XRT73R12IB em7 120 cc11r
Contextual Info: XRT73R12 PRELIMINARY TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT OCTOBER 2003 REV. P1.0.3 GENERAL DESCRIPTION The XRT73R12 provides a Parallel Microprocessor Interface for programming and control. The XRT73R12 is a twelve channel fully integrated Line Interface Unit LIU featuring EXAR’s R3

chn 834

Abstract: CHN 833 CR69 0X00 GR-253 GR-499-CORE XRT75R12D XRT75R12DIB CHN 703 GR-253 J0 byte length 14
Contextual Info: XRT75R12D TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DECEMBER 2006 REV. 1.0.1 GENERAL DESCRIPTION The XRT75R12D is a twelve channel fully integrated Line Interface Unit LIU featuring EXAR’s R3 Technology (Reconfigurable, Relayless Redundancy)

CHN 703

Abstract: diode ja8 75R12 AS11D eh3 encoder DMO10 DMO11 JA8R GR-253 GR-499-CORE
Contextual Info: XRT75R12 PRELIMINARY TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR OCTOBER 2003 REV. P1.0.2 GENERAL DESCRIPTION attenuator performance meets the ETSI TBR-24 and Bellcore GR-499 specifications. The XRT75R12 is a twelve channel fully integrated

Contextual Info: LMK04816 www.ti.com SNAS597B – JULY 2012 – REVISED APRIL 2013 LMK04816 Three Input Low-Noise Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04816 1 Introduction 1.1 FEATURES 123 • Ultra-Low RMS Jitter Performance – 100 fs RMS Jitter 12 kHz to 20 MHz

Contextual Info: Product Folder Sample & Buy Support & Community Tools & Software Technical Documents LMK04821, LMK04826, LMK04828 SNAS605AQ – MARCH 2013 – REVISED AUGUST 2014 LMK0482x Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs 1 Features

Contextual Info: LMK01801 www.ti.com SNAS573A – JANUARY 2012 – REVISED APRIL 2013 LMK01801 Dual Clock Divider Buffer Check for Samples: LMK01801 1 Device Summary 1.1 Features 12 • Pin Control Mode or MICROWIRE SPI • Input and Output Frequency Range 1 kHz to 3.1 GHz

ST CHN 703

Abstract: chn 53 b CHN 703 1117 3.3 diode ja8 jA8 find its figure 0X00 GR-253 GR-499-CORE XRT75R12
Contextual Info: XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER OCTOBER 2007 REV. 1.0.4 GENERAL DESCRIPTION attenuator performance meets the ETSI TBR-24 and Bellcore GR-499 specifications. The XRT75R12 is a twelve channel fully integrated Line Interface Unit LIU featuring EXAR’s R3

CRYSTAL 2.048 MHz

Abstract: ECS-200-20-30B-DU 501-04623G LMK03806 1611328 divide-by-25 VXB1-1137-15M360 2578-1
Contextual Info: LMK03806 Ultra Low Jitter Clock Generator with 14 Programmable Outputs 1.0 General Description 3.0 Features The LMK03806 is a high performance, ultra low-jitter, multirate clock generator capable of synthesizing 8 different frequencies on 14 outputs at frequencies of up to 2.6 GHz. Each

varactor 650 manual

Contextual Info: LMK04906 www.ti.com SNAS589C – NOVEMBER 2011 – REVISED DECEMBER 2012 LMK04906 Ultra Low Noise Clock Jitter Cleaner/Multiplier with 6 Programmable Outputs Check for Samples: LMK04906 FEATURES APPLICATIONS • • • 1 23 • • • • • • • •

Contextual Info: LMK04828B www.ti.com SNAS605 AO – MARCH 2013 – REVISED MARCH 2013 LMK04828 Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04828B 1 INTRODUCTION 1.1 Features 12 • JEDEC JESD204B Support • Ultra-Low RMS Jitter and Performance

Contextual Info: LMK03806 Ultra Low Jitter Clock Generator with 14 Programmable Outputs 1.0 General Description 3.0 Features The LMK03806 is a high performance, ultra low-jitter, multirate clock generator capable of synthesizing 8 different frequencies on 14 outputs at frequencies of up to 2.6 GHz. Each

Contextual Info: LMK04800 www.ti.com SNAS489J – MARCH 2011 – REVISED MARCH 2013 LMK04800 Family Low-Noise Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04800 1 FEATURES 123 • Ultra-Low RMS Jitter Performance – 111 fs RMS Jitter 12 kHz to 20 MHz – 123 fs RMS Jitter (100 Hz to 20 MHz)

LMK04828B

Contextual Info: LMK04828B www.ti.com SNAS605 AO – MARCH 2013 – REVISED MARCH 2013 LMK04828 Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04828B 1 INTRODUCTION 1.1 Features 12 • JEDEC JESD204B Support • Ultra-Low RMS Jitter and Performance

Contextual Info: LMK04826B, LMK04828B www.ti.com SNAS605 AP – MARCH 2013 – REVISED JUNE 2013 LMK0482xB Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04826B, LMK04828B 1 INTRODUCTION 1.1 Features 12 • JEDEC JESD204B Support

LMK04808

Abstract: LMK04800 LMK0480X
Contextual Info: LMK04800 Family Low-Noise Clock Jitter Cleaner with Dual Loop PLLs 1.0 General Description 2.0 Features The LMK04800 family is the industry's highest performance clock conditioner with superior clock jitter cleaning, generation, and distribution with advanced features to meet next

PS 1025

Contextual Info: LMK04816 Three Input Low-Noise Clock Jitter Cleaner with Dual Loop PLLs 1.0 General Description 2.0 Features The LMK04816 family is the industry's highest performance clock conditioner with superior clock jitter cleaning, generation, and distribution with advanced features to meet next

Contextual Info: ASM3P623S00B/C/J/E/F/K May 2007 rev 0.4 Timing-Safe Peak EMI reduction IC General Features • ASM3P623S00B/C/J is the eight-pin version and accepts Clock distribution with Timing-Safe™ Peak EMI Reduction Input frequency range: 20MHz - 50MHz • one reference input and drives out one low-skew clock.

chn 720

Abstract: chn 834 CR170 GR-253 J0 byte length 14
Contextual Info: XRT75R12D TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET APRIL 2006 REV. 1.0.1 GENERAL DESCRIPTION The XRT75R12D is a twelve channel fully integrated Line Interface Unit LIU featuring EXAR’s R3 Technology (Reconfigurable, Relayless Redundancy)

PS 1025

Abstract: Power Supply Control IC dap 07 LMK04828B LMK04828
Contextual Info: LMK04828B www.ti.com SNAS605 AO – MARCH 2013 – REVISED MARCH 2013 LMK04828 Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04828B 1 INTRODUCTION 1.1 Features 12 • JEDEC JESD204B Support • Ultra-Low RMS Jitter and Performance

VXB1-1137-15M360

Abstract: 38.88 NF 820 OLT block diagram GPON VXB1
Contextual Info: LMK03806 www.ti.com SNAS522H – SEPTEMBER 2011 – REVISED AUGUST 2012 LMK03806 Ultra Low Jitter Clock Generator with 14 Programmable Outputs Check for Samples: LMK03806 FEATURES 1 • 2 • • • • • • • High Performance, Ultra Low Jitter Clock

226 varactor

Contextual Info: TI Confidential - NDA Restrictions LMK04906 www.ti.com SNAS589B – NOVEMBER 2011 – REVISED DECEMBER 2012 LMK04906 Ultra Low Noise Clock Jitter Cleaner/Multiplier with 6 Programmable Outputs Check for Samples: LMK04906 FEATURES APPLICATIONS • • • 1

Contextual Info: LMK04816 www.ti.com SNAS597B – JULY 2012 – REVISED APRIL 2013 LMK04816 Three Input Low-Noise Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04816 1 Introduction 1.1 FEATURES 123 • Ultra-Low RMS Jitter Performance – 100 fs RMS Jitter 12 kHz to 20 MHz

SNAS605

Abstract: LMK04828 PS 1025 LMK04828B 0X158
Contextual Info: LMK04828B www.ti.com SNAS605 AO – MARCH 2013 – REVISED MARCH 2013 LMK04828 Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04828B 1 INTRODUCTION 1.1 Features 12 • JEDEC JESD204B Support • Ultra-Low RMS Jitter and Performance