CLK16 Search Results

TDR4

Abstract: dram controller DRAM CONTROLLER FPGA SCHEMATICS 272907 ethernet reference
Contextual Info: D DRAM CONTROLLER FPGA SCHEMATICS Switched Ethernet Reference Design Description Order Number: 272907-001 July, 1996 Appendix D: DRAM Controller FPGA Schematics WD_RESET CLK16MHZ 21 PAD_REF_CLK 31 OUTiPAD 32 PAD_WD_RESET# PAD_POS_WD_RST OUTPAD HDPAD VPP_EN

fe3001

Contextual Info: FE3001 WESTERN DIGITAL Figure 2. FE300I Block Diagram AT Control Logic I FE3001 WESTERN DIGITAL 84 1 CLK16 CLKHS 83 CLK14 55 56 RESIN PROCLK SYSCLK DMACLK TMRCLK PCLK PCLK ftÉSÓPU CLK287 ÒLYWR DMAMR RESET ÖNBRDL" 50 CPURES 51 MNIO MÉMC316 IOCS 16 ¿EROWS

floppy controller 44 pin

Contextual Info: ST84C72 ^STARTECH Printed September 7, 1994 IDE INTERFACE WITH I/O DECODE DESCRIPTION PLCC package The ST84C72 is designed to replace all necessary TTL logics for 16 bit IDE interface and decode logic for floppy controller and serial / parallel I/O ports. A select

FALC54

Abstract: intel i386ex pinout SIEMENS GIS voltage transformer d18211 i386ex Datasheet of apc46805 siemens rs232 connector com VG96 386EX 386EX EASY2254
Contextual Info: ICs for Communications Evaluation System for FALC54 EASY2254 Version 1.3.2 User’s Manual 05.97 T2254-XV13-M1-7600 EASY2254 Revision History: Current Version: 05.97 Previous Version: Page Page in previous (in new Version Version) Subjects (major changes since last revision)

Contextual Info: CB683 f C System Clock Buffer Approved Product _ PRODUCT FEA TURES_ • 24 output buffer divided into 3 groups for high clock fanout applications for CPU and PCI clocks. ■ Each output can be internally disabled for EMI reduction ■ EMI is further reduced by requiring only 1 single

Contextual Info: External Memory Interfaces in Stratix V Devices 7 2012.12.28 SV51008 Subscribe Feedback The Stratix V devices provide an efficient architecture that allows you to fit wide external memory interfaces to support a high level of system bandwidth within the small modular I/O bank structure. The I/Os are

MPC8255

Abstract: MPC8260 MPC860 SPEC95
Contextual Info: Advance Information MPC8255EC/D Rev. 0.1, 2/2002 MPC8255 Hardware Specifications This document contains detailed information on power considerations, DC/AC electrical characteristics, and AC timing specifications for the MPC8255 PowerQUICC II communications processor.

CRYSTAL-16

Abstract: ITB04876 ITP04874 ITS00560 ITS04875 MUNICH32 Q67100-A6059 tunable crystal oscillator ITS00562 ATT Preliminary Technical reference pub 62411
Contextual Info: ICs for Communications Primary Rate Access Clock Generator and Transceiver PRACT PEB 22320 Version 2.1 Data Sheet 04.95 PEB 22320 Revision History Current Version: 04.95 Previous Version: 05.93 Page Subjects changes since last revision 10 Architecture of the PRACT

Contextual Info: LTC2452 Ultra-Tiny, Differential, 16-Bit ΔΣ ADC with SPI Interface DESCRIPTION FEATURES ±VCC Differential Input Range n 16-Bit Resolution Including Sign , No Missing Codes n 2LSB Offset Error n 4LSB Full-Scale Error n 60 Conversions Per Second n Single Conversion Settling Time for Multiplexed

MPC8270

Abstract: ah222 k242 mPC 514 MPC8270VR MPC8270ZQ MPC8275 MPC8275VR MPC8275ZQ MPC8280
Contextual Info: Freescale Semiconductor MPC8280EC Rev. 1.7, 12/2006 Technical Data MPC8280 PowerQUICC II Family Hardware Specifications This document contains detailed information about power considerations, DC/AC electrical characteristics, and AC timing specifications for .13µm HiP7 members of the

SCK 016 thermistor

Abstract: LTC2450
Contextual Info: LTC2450 Easy-to-Use, Ultra-Tiny 16-Bit DS ADC Description Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ GND to VCC Single-Ended Input Range 0.02LSB RMS Noise 2LSB INL, No Missing Codes 2LSB Offset Error 4LSB Full-Scale Error Single Conversion Settling Time for Multiplexed

AN070

Abstract: philips application manchester manchester code verilog manchester verilog decoder manchester encoder an070
Contextual Info: INTEGRATED CIRCUITS AN070 Verilog implementation of a Manchester Encoder/Decoder in Philips CPLDs 1997 May 14 Philips Semiconductors Philips Semiconductors Application note Verilog implementation of a Manchester Encoder/Decoder in Philips CPLDs AN070 In this application note, Manchester code is defined, and the

PEB 20570

Abstract: H1442 DCL2000 various 4 mhz crystal osc PEB 20571
Contextual Info: Addendum DS2.1, 2003-08-04 DELIC-LC/DELIC-PB DSP Embedded Line and Port Interface Controller PEB 20570/PEB 20571/PEF 20570/PEF 20571 Version 3.1 1 Addendum to “DELIC Clock System Synchronization” The DELIC Clock System Synchronization is described in the DELIC-LC PEB 20570/

T60403-M5024

Abstract: T60403-L5032-X017 SIEMENS V.24 TO RS232 CABLE FALC54 D1391 PEB2255 RJ45 conector dual falc FSCQ CHARGE led message board circuits
Contextual Info: ICs for Communications Reference System for FALC-LH V1.3 EASY2255-R1 Tool Description 01.99 DS 1 • EASY2255-R1 Revision History: Current Version: 01.99 Previous Version: Page Page in previous (in current Version Version) Subjects (major changes since last revision)

MPC8255

Abstract: MPC8260 MPC860 SPEC95
Contextual Info: Freescale Semiconductor, Inc. Advance Information MPC8255EC/D Rev. 0.4, 5/2002 Freescale Semiconductor, Inc. MPC8255 Hardware Specifications This document contains detailed information on power considerations, DC/AC electrical characteristics, and AC timing specifications for the MPC8255 PowerQUICC II

Contextual Info: Ordering number : ENA1650C LC72715PW CMOS LSI Mobile FM Multiplex Broadcast IC with On-Chip VICS Decoder http://onsemi.com Overview The LC72715PW is a data demodulation LSI for receiving FM multiplex broadcasts for mobile reception in the DARC format. This LSI includes an on-chip bandpass filter for extracting the DARC signal from the FM baseband signal. It

Contextual Info: Ordering number : ENA2164A LC72715PLG CMOS LSI Mobile FM Multiplex Broadcast IC with On-Chip VICS Decoder for Mini Component, receiver http://onsemi.com Overview The LC72715PLG is a data demodulation LSI for receiving FM multiplex broadcasts for mobile reception in the

BCM8710

Abstract: 1031-25 BCM8711 DI15P
Contextual Info: BCM8710 PRODUCT Brief 10.3125 Gbps ETHERNET 16:1 SERIALIZER WITH CMU AND XSBI INTERFACE B C M 8 7 1 0 S U M M A R Y F E AT U R E S • IEEE 802.3ae 10.3125 Gbps Ethernet Serializer and O F B E N E F I T S Low-power consumption eliminates external heat • sinks,

Contextual Info: SEMICONDUCTOR CORPORATION Advance Product Information 2 488 Gbjt/sec VSC8164 1:16 SONET/SDH Demux Features • 2.488Gb/s 1:16 Demultiplexer • Differential LVPECL Low Speed Interface • Targeted for SONET OC-48 / SDH STM-16 • 128 Pin 14x20mm PQFP Package

ARM7500FE

Abstract: arm processor ARM processor pin configuration arm vector table BD 147 0077B BD698
Contextual Info: 1 20 11 Bus Interface This chapter describes the ARM7500FE bus interface. 20.1 Bus Arbitration 20-2 20.2 Bus Cycle Types 20-2 20.3 Video DMA Bandwidth 20-3 20.4 Video DMA Latency 20-4 ARM7500FE Data Sheet ARM DDI 0077B Open Access - Preliminary 20-1 Bus Interface

ARM7500FE

Abstract: 08FF 0x032000F8
Contextual Info: 1 18 11 I/O Subsystems This chapter describes the ARM7500FE I/O subsystems. 18.1 Introduction 18-2 18.2 I/O Address Space Usage 18-3 18.3 Additional I/O Chip Select Decode Logic 18-4 18.4 Simple 8MHz I/O 18-4 18.5 Module I/O 18-11 18.6 PC Bus-style I/O 18-15

Contextual Info: BCM8130 PRODUCT Brief MULTI-RATE 10 Gbps 16:1 MUX WITH CLOCK GENERATION B C M 8 1 3 0 S U M M A R Y F E AT U R E S • Fully integrated multi-rate clock multiplication unit CMU and multiplexer (MUX) • Support for multiple rates — OC-192: 9.953 Gbps,

Contextual Info: BCM8212 PRODUCT Brief TRANSCEIVER WITH INTERNAL LOOP TIMING AND PHASE DETECTOR B C M 8 2 1 2 S U M M A R Y F E AT U R E S • 2.488-Gbps SONET/SDH transceiver with O F B E N E F I T S • Low power consumption eliminates external heat dual differential serial I/O

Contextual Info: BCM8210 PRODUCT Brief 2.488 Gbps FULLY INTEGRATED LOW POWER SONET/SDH TRANSCEIVER B C M 8 2 1 0 S U M M A R Y F E AT U R E S O F B E N E F I T S • First CMOS OC-48 transceiver in the world. • Low power consumption eliminates external heat sink, • Fully integrated OC-48/STM-16 SONET/SDH