CDC2510B Search Results

CDC2510B

Abstract: CDC2510BPWR Y3020
Contextual Info: CDC2510B 3.3-V PHASE-LOCK LOOP CLOCK DRIVER SCAS612 – SEPTEMBER 1998 D D D D D D D D D D D D D D PW PACKAGE TOP VIEW Designed to Meet PC SDRAM Registered DIMM Specification Spread Spectrum Clock Compatible Operating Frequency 25 MHz to 125 MHz tPhase Error Minus Jitter at 66MHz to

Contextual Info: CDC2510B 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS612 B− SEPTEMBER 1998 − REVISED DECEMBER 2004 D Use CDCVF2510A as a Replacement for D D D D D D D D D D D D D D this Device Designed to Meet PC SDRAM Registered DIMM Specification Spread Spectrum Clock Compatible

Contextual Info: CDC2510B 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS612 B− SEPTEMBER 1998 − REVISED DECEMBER 2004 D Use CDCVF2510A as a Replacement for D D D D D D D D D D D D D D this Device Designed to Meet PC SDRAM Registered DIMM Specification Spread Spectrum Clock Compatible

CDC2510B

Abstract: CDC2510BPWR CDCVF2510A CLY 70
Contextual Info: CDC2510B 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS612 B− SEPTEMBER 1998 − REVISED DECEMBER 2004 D Use CDCVF2510A as a Replacement for D D D D D D D D D D D D D D this Device Designed to Meet PC SDRAM Registered DIMM Specification Spread Spectrum Clock Compatible

CDC2510B

Abstract: CDC2510BPWR
Contextual Info: CDC2510B 3.3-V PHASE-LOCK LOOP CLOCK DRIVER SCAS612 A– SEPTEMBER 1998 – REVISED JULY 2001 D D D D D D D D D D D D D D PW PACKAGE TOP VIEW Designed to Meet PC SDRAM Registered DIMM Specification Spread Spectrum Clock Compatible Operating Frequency 25 MHz to 125 MHz

Contextual Info: CDC2510B 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS612 B− SEPTEMBER 1998 − REVISED DECEMBER 2004 D Use CDCVF2510A as a Replacement for D D D D D D D D D D D D D D this Device Designed to Meet PC SDRAM Registered DIMM Specification Spread Spectrum Clock Compatible

CDC2509

Contextual Info: CDC2510B 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS612 B− SEPTEMBER 1998 − REVISED DECEMBER 2004 D Use CDCVF2510A as a Replacement for D D D D D D D D D D D D D D this Device Designed to Meet PC SDRAM Registered DIMM Specification Spread Spectrum Clock Compatible

Contextual Info: CDC2510B 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS612 B− SEPTEMBER 1998 − REVISED DECEMBER 2004 D Use CDCVF2510A as a Replacement for D D D D D D D D D D D D D D this Device Designed to Meet PC SDRAM Registered DIMM Specification Spread Spectrum Clock Compatible

Contextual Info: CDC2510B 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS612 B− SEPTEMBER 1998 − REVISED DECEMBER 2004 D Use CDCVF2510A as a Replacement for D D D D D D D D D D D D D D this Device Designed to Meet PC SDRAM Registered DIMM Specification Spread Spectrum Clock Compatible

Contextual Info: CDC2510B 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS612 B− SEPTEMBER 1998 − REVISED DECEMBER 2004 D Use CDCVF2510A as a Replacement for D D D D D D D D D D D D D D this Device Designed to Meet PC SDRAM Registered DIMM Specification Spread Spectrum Clock Compatible

Contextual Info: CDC2510B 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS612 B− SEPTEMBER 1998 − REVISED DECEMBER 2004 D Use CDCVF2510A as a Replacement for D D D D D D D D D D D D D D this Device Designed to Meet PC SDRAM Registered DIMM Specification Spread Spectrum Clock Compatible

Contextual Info: CDC2510B 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS612 B− SEPTEMBER 1998 − REVISED DECEMBER 2004 D Use CDCVF2510A as a Replacement for D D D D D D D D D D D D D D this Device Designed to Meet PC SDRAM Registered DIMM Specification Spread Spectrum Clock Compatible

Contextual Info: CDC2510B 3.3-V PHASE-LOCK LOOP CLOCK DRIVER SCAS612- SEPTEMBER 1998 PW PACKAGE TOP VIEW Designed to Meet PC SDRAM Registered DIMM Specification Spread Spectrum Clock Compatible AGND [ 1 Operating Frequency 25 MHz to 125 MHz vcc [ 2 1Y0 [ 3 1Y1 [ 4 tPhase Error Minus Jitter at 66MHz to

CDC2510B

Abstract: CDC2510BPWR CDCVF2510A CDC2509
Contextual Info: CDC2510B 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS612 B− SEPTEMBER 1998 − REVISED DECEMBER 2004 D Use CDCVF2510A as a Replacement for D D D D D D D D D D D D D D this Device Designed to Meet PC SDRAM Registered DIMM Specification Spread Spectrum Clock Compatible

Contextual Info: CDC2510B 3.3-V PHASE-LOCK LOOP CLOCK DRIVER SCAS612 – SEPTEMBER 1998 D D D D D D D D D D D D D D PW PACKAGE TOP VIEW Designed to Meet PC SDRAM Registered DIMM Specification Spread Spectrum Clock Compatible Operating Frequency 25 MHz to 125 MHz tPhase Error Minus Jitter at 66MHz to

Contextual Info: CDC2510B 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS612 B− SEPTEMBER 1998 − REVISED DECEMBER 2004 D Use CDCVF2510A as a Replacement for D D D D D D D D D D D D D D this Device Designed to Meet PC SDRAM Registered DIMM Specification Spread Spectrum Clock Compatible

Contextual Info: CDC2509B, CDC2510B 3.3-V PHASE-LOCK LOOP CLOCK DRIVER SCAS613A – SEPTEMBER 1998 – REVISED JULY 2001 D D D D D D D D D D D D D D Designed to Meet PC SDRAM Registered DIMM Specification Spread Spectrum Clock Compatible Operating Frequency 25 MHz to 125 MHz

MA2180

Contextual Info: SDRAM MODULE KMM377S2858AT2 KMM377S2858AT2 SDRAM DIMM Intel 1.1 ver. Base 128Mx72 SDRAM DIMM with PLL & Register based on Stacked 128Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM377S2858AT2 is a 128M bit x 72 Synchronous Dynamic RAM high density memory module. The

Contextual Info: KMM377S6428T3 PC100 Registered DIMM Revision History Revision 0.1 May. 24, 1999 - Changed "Detail C" in PCB Dimension. Rev. 0.1 May. 1999 KMM377S6428T3 PC100 Registered DIMM KMM377S6428T3 SDRAM DIMM 64Mx72 SDRAM DIMM with PLL & Register based on Stacked 64Mx4, 4Banks, 4K Ref., 3.3V SDRAMs with SPD

Contextual Info: SDRAM MODULE KMM377S2858AT3 KMM377S2858AT3 SDRAM DIMM 128Mx72 SDRAM DIMM with PLL & Register based on Stacked 128Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM377S2858AT3 is a 128M bit x 72 Synchronous Dynamic RAM high density memory module. The

Contextual Info: CDC2509B 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS613C − SEPTEMBER 1998 − REVISED DECEMBER 2004 D Use CDCVF2509A as a Replacement for D D D D D D D D D D D D D D this Device Designed to Meet PC SDRAM Registered DIMM Specification Spread Spectrum Clock Compatible

CCD 5pfm

Abstract: UC3637 class D audio CCD linear array RL 1502 L Infrared Data Access flyback uc3843 tl431 18V 5A Voltage to Current Converter 4-20mA XTR110 A 457 20w RF Receiver TRANSMITTER PAIR LM1111 CDC2509 TL31161
Contextual Info: Selection Guide NINTH EDITION Analog Master Selection Guide October 2003 1996, 1997, 1999, 2000, 2001, 2002, 2003 Texas Instruments Incorporated IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications,

KMM377S6428T3-GH

Abstract: KMM377S6428T3-GL
Contextual Info: KMM377S6428T3 PC100 Registered DIMM Revision History Revision 0.1 May. 24, 1999 - Changed "Detail C" in PCB Dimension. Revision 0.2 (April 29, 2000) - Added the description of " Staktek’s stacking technology is Samsung’s stacking technology of choice."

Contextual Info: CDC2509B 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS613C − SEPTEMBER 1998 − REVISED DECEMBER 2004 D Use CDCVF2509A as a Replacement for D D D D D D D D D D D D D D this Device Designed to Meet PC SDRAM Registered DIMM Specification Spread Spectrum Clock Compatible