CD74AC112 Search Results
CD74AC112 Result Highlights (3)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
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| CD74AC112M96 | Texas Instruments | Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 |
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| CD74AC112E | Texas Instruments | Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 |
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| CD74AC112M | Texas Instruments | Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 |
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CD74AC112 Datasheets (25)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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| CD74AC112 | Texas Instruments | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET | Original | 331.76KB | 10 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74AC112 | Texas Instruments | Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset | Original | 230.06KB | 8 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74AC112E | Texas Instruments | Dual J-K Negative-Edge-Triggered Flip-Flops with Clear and Preset | Original | 215.36KB | 10 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74AC112E | Texas Instruments | DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | Original | 230.07KB | 8 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74AC112E | Texas Instruments | Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 | Original | 647.16KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74AC112E | Harris Semiconductor | Dual J-K Flip-Flop with Set and Reset | Scan | 821.58KB | 10 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74AC112E | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical | 39.07KB | 1 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74AC112EE4 | Texas Instruments | Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset | Original | 353.79KB | 11 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74AC112EE4 | Texas Instruments | Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 | Original | 647.16KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74AC112EG4 | Texas Instruments | Integrated Circuits (ICs) - Logic - Flip Flops - IC FF JK TYPE DUAL 1BIT 16DIP | Original | 906.96KB | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74AC112M | Texas Instruments | Dual J-K Negative-Edge-Triggered Flip-Flops with Clear and Preset | Original | 215.36KB | 10 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74AC112M | Texas Instruments | DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | Original | 230.07KB | 8 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74AC112M | Texas Instruments | Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 | Original | 647.16KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74AC112M | Harris Semiconductor | Dual J-K Flip-Flop with Set and Reset | Scan | 821.58KB | 10 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74AC112M | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical | 39.07KB | 1 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74AC112M96 | Texas Instruments | Dual J-K Negative-Edge-Triggered Flip-Flops with Clear and Preset | Original | 215.36KB | 10 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74AC112M96 | Texas Instruments | DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | Original | 230.07KB | 8 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74AC112M96 | Texas Instruments | Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 | Original | 647.16KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74AC112M96 | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical | 39.07KB | 1 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74AC112M96E4 | Texas Instruments | Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset | Original | 353.79KB | 11 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
CD74AC112 Price and Stock
Texas Instruments CD74AC112M96Flip Flop JK-Type Neg-Edge 2-Element 16-Pin SOIC T/R |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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CD74AC112M96 | 22,800 | 826 |
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CD74AC112M96 | 2,309 |
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CD74AC112M96 | 22,800 | 1 |
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CD74AC112M96 | 2,500 |
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Get Quote | |||||||
Texas Instruments CD74AC112MFlip Flop JK-Type Neg-Edge 2-Element 16-Pin SOIC Tube |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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CD74AC112M | 3,655 | 411 |
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| CD74AC112M | 1,800 | 411 |
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| CD74AC112M | 1,680 | 411 |
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| CD74AC112M | 1,000 | 411 |
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CD74AC112M | 8,215 | 1 |
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CD74AC112M | 467 | 3 |
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Texas Instruments CD74AC112EFlip Flop JK-Type Neg-Edge 2-Element 16-Pin PDIP Tube |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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CD74AC112E | 3,325 | 398 |
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| CD74AC112E | 3,064 | 398 |
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| CD74AC112E | 1,300 | 398 |
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CD74AC112E | 466 |
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CD74AC112E | 7,689 | 1 |
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CD74AC112E | 943 | 1 |
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Buy Now | ||||||
Harris Semiconductor CD74AC112ECD74AC112E |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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CD74AC112E | 727 | 398 |
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CD74AC112E | 235 |
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CD74AC112E | 742 | 1 |
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RCA CD74AC112EJ-K FLIP-FLOP, AC SERIES, 2-FUNC, NEGATIVE EDGE TRIGGERED, 2-BIT, COMPLEMENTARY OUTPUT, CMOS, PDIP16 |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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CD74AC112E | 8 |
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CD74AC112 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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Contextual Info: CD54AC112, CD74AC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS325 – JANUARY 2003 D D D D D D CD54AC112 . . . F PACKAGE CD74AC112 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the |
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cd54ac112cd74ac112schs32524-ma+2 | |
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Contextual Info: CD54AC112, CD74AC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS325 – JANUARY 2003 D D D D D D CD54AC112 . . . F PACKAGE CD74AC112 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the |
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cd54ac112cd74ac112schs32524-ma+2 | |
AC112
Abstract: AC112M CD54AC112 CD54AC112F3A CD74AC112 CD74AC112E CD74AC112M CD74AC112M96
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cd54ac112cd74ac112schs32524-ma+7 | |
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Contextual Info: CD54AC112, CD74AC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS325 – JANUARY 2003 D D D D D D CD54AC112 . . . F PACKAGE CD74AC112 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the |
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cd54ac112cd74ac112schs32524-ma+2 | |
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Contextual Info: CD54AC112, CD74AC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS325 – JANUARY 2003 D D D D D D CD54AC112 . . . F PACKAGE CD74AC112 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the |
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cd54ac112cd74ac112schs32524-ma+1 | |
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Contextual Info: CD54AC112, CD74AC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS325 – JANUARY 2003 D D D D D D CD54AC112 . . . F PACKAGE CD74AC112 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the |
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cd54ac112cd74ac112schs32524-ma+2 | |
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Contextual Info: CD54AC112, CD74AC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS325 – JANUARY 2003 D D D D D D CD54AC112 . . . F PACKAGE CD74AC112 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the |
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cd54ac112cd74ac112schs32524-ma+2 | |
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Contextual Info: CD54AC112, CD74AC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS325 – JANUARY 2003 D D D D D D CD54AC112 . . . F PACKAGE CD74AC112 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the |
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cd54ac112cd74ac112schs32524-ma+1 | |
CD74ACT109EContextual Info: Data sheet acquired from Harris Semiconductor SCHS282 This data sheet is applicable to the CD54/74AC109, CD54AC112, CD45ACT109, and CD54ACT112. See SCHS233 for information on the CD74AC112, CD74ACT109, and CD74ACT112. IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue |
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schs282cd54/74ac109cd54ac112cd45act109+7 | |
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Contextual Info: Data sheet acquired from Harris Semiconductor SCHS282 This data sheet is applicable to the CD54/74AC109, CD54AC112, CD45ACT109, and CD54ACT112. See SCHS233 for information on the CD74AC112, CD74ACT109, and CD74ACT112. IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue |
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schs282cd54/74ac109cd54ac112cd45act109+5 | |
E0399Contextual Info: CD54AC112, CD74AC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS325 – JANUARY 2003 D D D D D D CD54AC112 . . . F PACKAGE CD74AC112 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the |
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Contextual Info: CD54AC112, CD74AC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS325 – JANUARY 2003 D D D D D D CD54AC112 . . . F PACKAGE CD74AC112 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the |
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cd54ac112cd74ac112schs32524-ma+2 | |
AC112
Abstract: AC112M CD54AC112 CD54AC112F3A CD74AC112 CD74AC112E CD74AC112M CD74AC112M96
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cd54ac112cd74ac112schs32524-ma+7 | |
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Contextual Info: CD54AC112, CD74AC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS325 – JANUARY 2003 D D D D D D CD54AC112 . . . F PACKAGE CD74AC112 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the |
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AC112M
Abstract: AC112 CD54AC112 CD54AC112F3A CD74AC112 CD74AC112E CD74AC112M CD74AC112M96
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cd54ac112cd74ac112schs32524-ma+7 | |
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Contextual Info: CD54AC112, CD74AC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS325 – JANUARY 2003 D D D D D D CD54AC112 . . . F PACKAGE CD74AC112 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the |
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cd54ac112cd74ac112schs32524-ma+2 | |
AC112
Abstract: AC112M CD54AC112 CD54AC112F3A CD74AC112 CD74AC112E CD74AC112M CD74AC112M96
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cd54ac112cd74ac112schs32524-ma+7 | |
AC112
Abstract: AC112M CD54AC112 CD54AC112F3A CD74AC112 CD74AC112E CD74AC112M CD74AC112M96
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cd54ac112cd74ac112schs32524-ma+7 | |
AC112
Abstract: AC112M CD54AC112 CD54AC112F3A CD74AC112 CD74AC112E CD74AC112M CD74AC112M96
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cd54ac112cd74ac112schs32524-ma+7 | |
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Contextual Info: CD54AC112, CD74AC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS325 – JANUARY 2003 D D D D D D CD54AC112 . . . F PACKAGE CD74AC112 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the |
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cd54ac112cd74ac112schs32524-ma+2 | |
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Contextual Info: CD54AC112, CD74AC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS325 – JANUARY 2003 D D D D D D CD54AC112 . . . F PACKAGE CD74AC112 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the |
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cd54ac112cd74ac112schs32524-ma+2 | |
AC112
Abstract: AC112M CD54AC112 CD54AC112F3A CD74AC112 CD74AC112E CD74AC112M CD74AC112M96
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cd54ac112cd74ac112schs32524-ma+7 | |
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Contextual Info: CD54AC112, CD74AC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS325 – JANUARY 2003 D D D D D D CD54AC112 . . . F PACKAGE CD74AC112 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the |
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cd54ac112cd74ac112schs32524-ma+2 | |
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Contextual Info: CD54AC112, CD74AC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS325 – JANUARY 2003 D D D D D D CD54AC112 . . . F PACKAGE CD74AC112 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the |
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cd54ac112cd74ac112schs32524-ma+2 | |