CD4023 Search Results

CD4011B

Abstract: CD4012B CD4023B MS-001 CD4012
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS021D – Revised September 2003 The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages F3A suffix , 14-lead dual-in-line plastic packages (E suffix), 14-lead

cd40111

Abstract: FUNCTIONAL DIAGRAM OF CD4011 TI CD4023UB mas 6 rca 15-V CD4011UB CD4012UB CD4023UB RCA-CD4011UB
Contextual Info: CD4011UB, CD4012UB, CD4023UB Types CM OS NAND Gates High-Voltage Types 2 0 -V o lt Rating Features: • Quad 2 In p u t — C D 4 0 1 1 U B Dual 4 In p u t — C D 4 0 1 2 U B Trip le 3 In p u t — C D 4 0 2 3 U B ■ ■ The R C A -C D 4 0 1 1 U B , C D 4 0 1 2 U B , and

FUNCTIONAL DIAGRAM OF CD4011

Abstract: CD40118 CD4011B CD4023B CD4011BH 15-V CD4012B h1131 RCA-CD4011B
Contextual Info: CD4011B, CD4012B, CD 4023B Types CM OS NAND GATES Features: High-Voltage Types 20-Volt Rating Quad 2 Input — CD4011B Dual 4 Input — CD4012B Triple 3 Input — CD4023B RCA-CD4011B, CD4012B. and CD4023B NAND gates provide the system designer with direct implementation of the N AND

CD4011B

Abstract: CD4011BMS CD4012B CD4012BMS CD4023B CD4023BMS
Contextual Info: S E M I C O N D U C T O R CD4011BMS, CD4012BMS CD4023BMS CMOS NAND Gates November 1994 Features Pinouts • High-Voltage Types 20V Rating CD4011BMS TOP VIEW • Propagation Delay Time = 60ns (typ.) at CL = 50pF, VDD = 10V • Buffered Inputs and Outputs

Contextual Info: Revised April 2002 CD4023BC Buffered Triple 3-Input NAND Gate General Description Features These triple gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and Pchannel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered

CD40238

Abstract: IC CD4011B
Contextual Info: v Tex a s In s t r u m e n t s CD4011B, CD4012B, CD4023B Types D a ta s h e e t acquired from Harris S em iconductor SCHS021 CMOS NAND GATES Features: High-Voltage Types 20-Volt Rating Quad 2 Input — CD4011B Dual 4 In p u t-C D 4 0 1 2 B Triple 3 Input — CD4023B

Contextual Info: 37E HARRIS SEMICOND SECTOR D • 4302E71 0 1 3875081 G E SOLID STATE £ 0G213SÔ 1 3 5 4 4 T IHAS o CD4011A, CD4012A, CD4023A Types CM O S NAND Gates Features: Quad 2 Input — CD 4011A Dual 4 Input — CD 4012A Triple 3 Input - CD 4023A The RCA-CD4011A, CD4012A, and CD4023A N A N D gates provide the system

cd4025bcn

Contextual Info: CD4023BM CD4023BC Buffered Triple 3-Input NAND Gate CD4025BM CD4025BC Buffered Triple 3-Input NOR Gate General Description Features These triple gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and P-channel enhancement mode transistors They have equal source

cd4012be

Abstract: CD4012BNSRE4
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS021D – Revised September 2003 The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages F3A suffix , 14-lead dual-in-line plastic packages (E suffix), 14-lead

D4011Bc

Abstract: d4023b farnell d4011b D4012B
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS021D – Revised September 2003 The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages F3A suffix , 14-lead dual-in-line plastic packages (E suffix), 14-lead

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS021C – Revised July 2003 The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages F3A suffix , 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M , M96, and NSR

gd4011

Abstract: CD4011A CD4023A CD4011 CD4012A CD4023AH
Contextual Info: HARRIS 3875081 SEflICOND G E SOLID 37E D SECTOR m 43D5271 DG213SÔ T 01 E STATE 13544 IHAS D CD 4011A, CD4012A, CD4023 A Types CMOS NAND Gates Features: Quad 2 Input — CD4011A Dual 4 Input — CD4012A Triple 3 Input - CD4023A The RCA-CD4011A, CD4012A, and CD4023A NAND gates provide the system

89265AKB3T

Abstract: 89266AKB3T 89273AKB3T CD4011B CD4011BE CD4011BEE4 CD4011BF CD4011BF3A CD4012B CD4023B
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS021D – Revised September 2003 The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages F3A suffix , 14-lead dual-in-line plastic packages (E suffix), 14-lead

IC CD4011

Abstract: IC cd4011 for pin function note on cd4011 U549-I CD4011 IC cd4011 function diagram CD4011B CD4011BMS CD4012B CD4012BMS
Contextual Info: CD4011BMS, CD4012BMS CD4023BMS Semiconductor CMOS NAND Gates November 1994 Pinouts Features • High-Voltage Types 20V Rating CD4011BMS T O P V IE W • Propagation VDD = 10V Delay Time = 60ns (typ.) at CL = 50pF, u • Buttered Inputs and Outputs A IT 14] VDD

89265AKB3T

Abstract: 89266AKB3T 89273AKB3T CD4011B CD4011BE CD4011BEE4 CD4011BF CD4011BF3A CD4012B CD4023B
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS021D – Revised September 2003 The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages F3A suffix , 14-lead dual-in-line plastic packages (E suffix), 14-lead

CD4012B

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS021D – Revised September 2003 The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages F3A suffix , 14-lead dual-in-line plastic packages (E suffix), 14-lead

CD4026BC

Abstract: CD4025BM/CD4026BC CD4025BCN
Contextual Info: CD4023BM/CD4023BC, CD4025BM/CD4025BC National Semiconductor CD4023BM/CD4023BC Buffered Triple 3-Input NAND Gate CD4025BM/CD4025BC Buffered Triple 3-Input NOR Gate General Description Features These triple gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and

74LS

Abstract: CD4023BC CD4023BCM CD4023BCN CD4023BCSJ M14A M14D MS-001 N14A CD4023
Contextual Info: Revised April 2002 CD4023BC Buffered Triple 3-Input NAND Gate General Description Features These triple gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and Pchannel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered

Contextual Info: B H A R R I S S E M I C O N D U C T O R CD4011BMS, CD4012BMS CD4023BMS CMOS NAND Gates December 1992 Pinouts Features CD4011BMS TOP VIEW • High-Voltage Types (20V Rating • Propagation Delay Time = 60ns (typ.) at CL * 50pF, VDD = 10V Ü] VDO • Buffered Inputs and Outputs

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS313 PACKAGE OPTION ADDENDUM www.ti.com 29-Jun-2006 PACKAGING INFORMATION Status 1 Package Type Package Drawing CD4011AD3 ACTIVE CDIP SB JD 14 CD4023AFB OBSOLETE CDIP J 14 JM38510/05001BCA ACTIVE CDIP J 14

CD4012BNSRE4

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS021D – Revised September 2003 The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages F3A suffix , 14-lead dual-in-line plastic packages (E suffix), 14-lead

CD4012BNSRE4

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS021D – Revised September 2003 The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages F3A suffix , 14-lead dual-in-line plastic packages (E suffix), 14-lead

CD4012BNSRE4

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS021D – Revised September 2003 The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages F3A suffix , 14-lead dual-in-line plastic packages (E suffix), 14-lead

CD4012B

Abstract: CD4011B CD4011BMS CD4012BMS CD4023B CD4023BMS
Contextual Info: CD4011BMS, CD4012BMS CD4023BMS CMOS NAND Gates November 1994 Features Pinouts • High-Voltage Types 20V Rating CD4011BMS TOP VIEW • Propagation Delay Time = 60ns (typ.) at CL = 50pF, VDD = 10V A 1 14 VDD B 2 13 H J = AB 3 12 G K = CD 4 11 M = GH • Buffered Inputs and Outputs