ATH3000L Search Results

ATH3000L Datasheets (13)

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Atmel

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
ATH3000L-20JC		Atmel	High Throughput UV Erasable Programmable Logic Device	Scan	PDF	404.04KB	12
ATH3000L-20KC		Atmel	High Throughput UV Erasable Programmable Logic Device	Scan	PDF	404.04KB	12
ATH3000L-20UC		Atmel	High Throughput UV Erasable Programmable Logic Device	Scan	PDF	404.04KB	12
ATH3000L-25JC		Atmel	High Throughput UV Erasable Programmable Logic Device	Scan	PDF	404.04KB	12
ATH3000L-25JI		Atmel	High Throughput UV Erasable Programmable Logic Device	Scan	PDF	404.04KB	12
ATH3000L-25KC		Atmel	High Throughput UV Erasable Programmable Logic Device	Scan	PDF	404.04KB	12
ATH3000L-25KI		Atmel	High Throughput UV Erasable Programmable Logic Device	Scan	PDF	404.04KB	12
ATH3000L-25KM		Atmel	High Throughput UV Erasable Programmable Logic Device	Scan	PDF	404.04KB	12
ATH3000L-25KM/883		Atmel	High Throughput UV Erasable Programmable Logic Device	Scan	PDF	404.04KB	12
ATH3000L-25UC		Atmel	High Throughput UV Erasable Programmable Logic Device	Scan	PDF	404.04KB	12
ATH3000L-25UI		Atmel	High Throughput UV Erasable Programmable Logic Device	Scan	PDF	404.04KB	12
ATH3000L-25UM		Atmel	High Throughput UV Erasable Programmable Logic Device	Scan	PDF	404.04KB	12
ATH3000L-25UM/883		Atmel	High Throughput UV Erasable Programmable Logic Device	Scan	PDF	404.04KB	12

ATH3000L Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
Contextual Info: ATH3000/L Features • • • • • • • High Through-Put Programmable Logic Device High Speed - 83.3 MHz System Clock Rate Operation Low Power - 0.5 mA Typical ATH3000L Flexible Interconnect Architecture • Universal Routing 56 Logic Cells -56 Flip-Flops -56 I/O Pins	OCR Scan	ath3000/l ath3000l ath3000l-25jc ath3000l-25kc +6ath3000l-25uc ath3000l-25km ath3000l-25um ath3000l-20jc ath3000l-20kc ath3000l-20uc	PDF
tea 2164 g Contextual Info: ATH3000/L Features • • • • • • • High Through-Put Programmable Logic Device High Speed - 83.3 MHz System Clock Rate Operation Low Power - 2 mA Typical ATH3000L Flexible Interconnect Architecture - Universal Routing 56 Logic Cells - 56 Flip-Flops - 56 I/O Pins	OCR Scan	ath3000/l ath3000l tath3000-25km/883 ath3000-25um/883 +7ath3000l-20jc ath3000l-20kc ath3000l-20uc ath3000l-20ji ath3000l-20ki ath3000l-20ui tea 2164 g	PDF
ATH3000-15JC Abstract: H10IO din 7167 Contextual Info: ATH3000/L Features • High Through-Put Programmable Logic Device • High Speed - 83.3 MHz System Clock Rate Operation • Low Power - 0.5 mA Typical ATH3000L • Flexible Interconnect Architecture - Universal Routing • 56 Logic Cells - 56 Flip-Flops - 56 I/O Pins	OCR Scan	ath3000/l ath3000l ath3000l-20jc ath3000l-20kc +9ath3000l-20uc ath3000l-20ji ath3000l-20ki ath3000l-20ui ath3000l-25jc ath3000l-25kc ath3000-15jc h10io din 7167	PDF
ATMEL 930 Contextual Info: Features • • • • • • • High Through-Put Programmable Logic Device High Speed - 83.3 MHz System Clock Rate Operation Low Power - Less than 0.5 mA Typical ATH3000L Flexible Interconnect Architecture - Universal Routing 56 Logic Cells - 56 Flip-Flops - 56 I/O Pins	OCR Scan	ath3000l 0162a-5/92/20m atmel 930	PDF
Atmel U 114 Contextual Info: 53E D 1074177 0002504 bòi IATM ATHEL CORP Features • • • • • • • High Through-Put Programmable Logic Device High Speed •83.3 MHz System Clock Rate Operation Low Power • Less than 0.5 mA Typical ATH3000L Flexible Interconnect Architecture - Universal Routing	OCR Scan	ath3000l 0162a-5/92/20m atmel u 114	PDF
Contextual Info: Features • • • • • • • High Through-Put Programmable Logic Device High Speed - 83.3 MHz System Clock Rate Operation Low Power - Less than 0.5 mA Typical ATH3000L Flexible Interconnect Architecture - Universal Flouting 56 Logic Cells - 56 Flip-Flops - 56 I/O Pins	OCR Scan	ath3000l 0162a-5/92/20m	PDF
Contextual Info: ATH3000/L Features • • • • • • • High Through-Put Programmable Logic Device High Speed - 83.3 MHz System Clock Rate Operation Low Power - 0.5 mA Typical ATH3000L Flexible Interconnect Architecture - Universal Routing 56 Logic Cells -56 Flip-Flops -56 I/O Pins	OCR Scan	ath3000/l ath3000l pth3000l-20jc ath3000l-20kc +6ath3000l-20uc ath3000l-25jc ath3000l-25kc ath3000l-25uc ath3000l-25ji ath3000l-25ki	PDF
JLCC-68 Contextual Info: ATH3000/L Features • • • • • • • High Through-Put Programmable Logic Device High Speed - 83.3 MHz System Clock Rate Operation Low Power - 0.5 mA Typical ATH3000L Flexible Interconnect Architecture - Universal Routing 56 Logic Cells • 56 Flip-Flops • 56 I/O Pins	OCR Scan	ath3000/l ath3000l dh3000/l ath3000l-20jc +7ath3000l-20kc ath3000l-20uc ath3000l-20ji ath3000l-20ki ath3000l-20ui ath3000l-25jc jlcc-68	PDF