AS7C3128K32Z Search Results
AS7C3128K32Z Datasheets Context Search
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Contextual Info: Advance information •■ I l AS7C3128K32Z AS7C3128K36Z I 3.3V 128Kx32/36 synchronous burst SRAM with ZBT1 Features • • • • • • • • • • O rg an izatio n : 1 3 1 ,0 7 2 w o rd s x 3 2 o r 3 6 bits ZBT arc h ite c tu re fo r efficien t b u s o p e ra tio n |
OCR Scan |
as7c3128k32zas7c3128k36z128kx32/36100-pin+4 | |
A301D
Abstract: DA301 A210D
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Original |
\qfkurqrxvexuvw650zlwk1714x20mma301d+2 | |
SRAM 64KX8 5VContextual Info: A Product Guide "641 Ali densities is bits TÎÎT 256K- —I.8V /2.S V /3.3V — 64KX16 ! -3.3V 32ÏX 8 asynchronous asynchronous in x: 8Kx8 I 32KX8 64KX8 32KX16 128KX8 I j!28gxl6| 64KX16 64KX8 128KX8 64KXJ6 32XX16 -3.3V 32KX32 synchronous Memories- -ED O |
OCR Scan |
256k-128kx864kx1664kx8+4 | |
SRAM 64KX8 5V
Abstract: 128U K SRAM 512*8 SRAM 3.3v 1Mx8 SRAM edo dRAM AS7C40
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OCR Scan |
as7c164as7c256as7c512as7c513+13 | |
AS4C1M16FS
Abstract: 1Mx16 flash 3.3v 1Mx8 SRAM
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OCR Scan |
as29f002j4s29f03as29f040as29f080+9 | |
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Contextual Info: Features Advance information • Organization: ¡31,072 words x 32 or 36 bits • ZBT architecture for efficient bus operation • Fast clock speeds to 166 MHz • Fast dock to data access: 3.5/3.8 /4 /S ns • Fast OE access time: 3 .5 /3 .5 /3 .8 /4 ns • Fully synchronous register-to-register operation |
OCR Scan |
100-pinas7c3128k32zas7c3128k36z128k36z+2 |