ALVC00 Search Results

ALVC00

Contextual Info: ALVC00 3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-NAND GATE INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-NAND GATE FEATURES: – – DESCRIPTION: This quadruple 2-input positive-NAND gate is built using advanced dual metal CMOS technology. The ALVC00 performs the Boolean function

Contextual Info: Revised September 2001 ALVC00 Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs General Description Features The ALVC00 contains four 2-input NAND gates. This product is designed for low voltage 1.2V to 3.6V VCC applications with I/O compatibility up to 3.6V.

Contextual Info: _ irr R 3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-NAND GATE i i ALVC00 ADVANCE INFORMATION D E S C R IP T IO N : FEATURES: - 0.5 MICRON CMOS Technology - ESD > 2000V per MIL-STD-883, Method 3015; vanced dual metal C MOS technology. The ALVC00 performs the

74ALVC00

Abstract: 74ALVC00M 74ALVC00MTC M14A MTC14
Contextual Info: Revised February 2005 ALVC00 Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs General Description Features The ALVC00 contains four 2-input NAND gates. This product is designed for low voltage 1.65V to 3.6V VCC applications with I/O compatibility up to 3.6V.

"pulse generator"

Abstract: Quad 2-Input AND Gate "NAND Gate" cmos nand nand gate
Contextual Info: ALVC00 3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-NAND GATE INDUSTRIAL TEMPERATURE RANGE ALVC00 3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-NAND GATE DESCRIPTION: FEATURES: This quadruple 2-input positive-NAND gate is built using advanced dual metal CMOS technology. The ALVC00 performs the Boolean function Y =

74ALVC00

Abstract: 74ALVC00M 74ALVC00MTC M14A MTC14
Contextual Info: Revised October 2001 ALVC00 Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs General Description Features The ALVC00 contains four 2-input NAND gates. This product is designed for low voltage 1.65V to 3.6V VCC applications with I/O compatibility up to 3.6V.

74ALVC00

Abstract: 74ALVC00M 74ALVC00MTC M14A MTC14
Contextual Info: Revised February 2002 ALVC00 Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs General Description Features The ALVC00 contains four 2-input NAND gates. This product is designed for low voltage 1.65V to 3.6V VCC applications with I/O compatibility up to 3.6V.

Contextual Info: ALVC00-Q1 QUADRUPLE 2-INPUT POSITIVE-NAND GATE SCES490C − SEPTEMBER 2003 − REVISED JANUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D OR PW PACKAGE TOP VIEW MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)

Contextual Info: ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G – JULY 1997 – REVISED AUGUST 2004 • FEATURES Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17 14 2

Contextual Info: ALVC00ĆQ1 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE SCES490B − SEPTEMBER 2003 − REVISED MAY 2004 D Qualification in Accordance With D D D D D D D D OR PW PACKAGE TOP VIEW AEC-Q100† Qualified for Automotive Applications Customer-Specific Configuration Control

ALVC00

Abstract: DSC-4632
Contextual Info: ALVC00 3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-NAND GATE EXTENDED COMMERCIAL TEMPERATURE RANGE ALVC00 ADVANCE INFORMATION 3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-NAND GATE DESCRIPTION: FEATURES: – – 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015;

Contextual Info: ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G – JULY 1997 – REVISED AUGUST 2004 • FEATURES Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17 14 2

A115-A

Abstract: C101 SN74ALVC00 SN74ALVC00RGYR
Contextual Info: ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G – JULY 1997 – REVISED AUGUST 2004 • FEATURES Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17 14 2

Contextual Info: ALVC00ĆQ1 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE SCES490B − SEPTEMBER 2003 − REVISED MAY 2004 D Qualification in Accordance With D D D D D D D D OR PW PACKAGE TOP VIEW AEC-Q100† Qualified for Automotive Applications Customer-Specific Configuration Control

Contextual Info: ALVC00ĆEP QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE SCES521A − DECEMBER 2003 − REVISED MAY 2004 D Controlled Baseline D D D D D D D D − One Assembly/Test Site, One Fabrication Site Enhanced Diminishing Manufacturing Sources DMS Support Enhanced Product-Change Notification

SN74ALVC00

Abstract: SN74ALVC00IDRG4Q1 SN74ALVC00IDRQ1 SN74ALVC00IPWRQ1
Contextual Info: ALVC00ĆQ1 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE SCES490C − SEPTEMBER 2003 − REVISED JANUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D OR PW PACKAGE TOP VIEW MIL-STD-883, Method 3015; Exceeds 200 V

Contextual Info: ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G – JULY 1997 – REVISED AUGUST 2004 • FEATURES Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17 14 2

Contextual Info: ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G – JULY 1997 – REVISED AUGUST 2004 • FEATURES Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17 14 2

Contextual Info: ALVC00-Q1 QUADRUPLE 2-INPUT POSITIVE-NAND GATE SCES490C − SEPTEMBER 2003 − REVISED JANUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D OR PW PACKAGE TOP VIEW MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)

Contextual Info: ALVC00ĆEP QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE SCES521A − DECEMBER 2003 − REVISED MAY 2004 D Controlled Baseline D D D D Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per

A115-A

Abstract: C101 SN74ALVC00 SN74ALVC00RGYR
Contextual Info: ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G – JULY 1997 – REVISED AUGUST 2004 • FEATURES Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17 14 2

Contextual Info: ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G – JULY 1997 – REVISED AUGUST 2004 • FEATURES Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17 14 2

Contextual Info: ALVC00-Q1 QUADRUPLE 2-INPUT POSITIVE-NAND GATE SCES490C − SEPTEMBER 2003 − REVISED JANUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D OR PW PACKAGE TOP VIEW MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)

Contextual Info: ALVC00ĆQ1 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE SCES490B − SEPTEMBER 2003 − REVISED MAY 2004 D Qualification in Accordance With D D D D D D D D OR PW PACKAGE TOP VIEW AEC-Q100† Qualified for Automotive Applications Customer-Specific Configuration Control