ALA400 Search Results

pnp 8 transistor array

Abstract: ALA400 transistor BIPOLAR npn 8 transistor array 1000 volt pnp transistor JFET 401 ARRAY resistor DS87-61LBC kss 216 complementary JFET
Contextual Info: AT&T Preliminary Data Sheet ALA400/401 Linear Array Fam ily Description The ALA400/401 Linear Array Family is fabricated using the complementary bipolar integrated circuit CBIC process that offers the advantages of vertical NPN and vertical PNP transistors. CBIC technology

Contextual Info: * AT&T Preliminary Data Sheet ALA400/401 Linear Array Family Description The ALA400/401 Linear Array Family is fabricated using the complementary bipolar integrated circuit CBIC process that offers the advantages of vertical NPN and vertical PNP transistors. CBIC technology

Contextual Info: ALA400/401 LINEAR ARRAY Description The ALA400/401 Linear Array Family is fabricated using the complementary bipolar integrated circuit CBIC process that offers the advantages of vertical NPN and vertical PNP transistors. CBIC technology offers the advantage of

Contextual Info: Data Sheet June 1998 MC4OA03 Macrocell Features Description n Low input bias currents, IIN = 10 nA n On-chip frequency compensation n Low VOS and IOS n Good CMRR and PSRR n Class AB output The MC4OA03 predefined macrocell is a PNP input, low input bias operational amplifier metallized on the ALA400

Contextual Info: K B 4 0 0 0 B u ild in g B lo c k K it for A LA 4 0 0 Fam ily S e m i-C u sto m Linear A rrays Description The KB4000 Building Block Kit contains a variety of components that gives designers the capability to breadboard analog circuits. With the building block kit, designers have a tool for evaluating the many

Contextual Info: Data Sheet June 1998 MC4OA04 Macrocell Features Description • Low input bias current, IIN = 50 pA ■ On-chip frequency compensation ■ Low IOS ■ Good CMRR and PSRR ■ Class AB output ■ Typical slew rate of 20 V/µs The MC4OA04 predefined macrocell is a JFET input,