AD8376 Search Results

OPA MHZ

Abstract: transformer OPB 0805LS-102XJBB AD6655 AD8376 AD9246 AD9445 AD9640 ETC1-1-13 8B29
Contextual Info: Ultralow Distortion IF Dual VGA AD8376 FEATURES FUNCTIONAL BLOCK DIAGRAM A4 A3 A2 A1 A0 Dual independent digitally controlled VGAs Bandwidth of 700 MHz −3 dB Gain range: −4 dB to +20 dB Step size: 1 dB ± 0.2 dB Differential input and output Noise figure: 8.7 dB @ maximum gain

32 ld LFCSP

Abstract: SCHEMATIC VGA ad605 ad8326
Contextual Info: Ultra Low Distortion IF Dual VGA AD8376 Preliminary Technical Data FUNCTIONAL BLOCK DIAGRAM FEATURES Dual Independent Digitally Controlled VGAs -4 to 20dB Gain Range 1 dB Step Size ± 0.2 dB Differential input and output 150 Ω Differential Input Open Collector Differential Output

Contextual Info: Ultralow Distortion IF Dual VGA AD8376 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM A4 A3 A2 A1 A0 Dual independent digitally controlled VGAs Bandwidth of 700 MHz −3 dB Gain range: −4 dB to +20 dB Step size: 1 dB ± 0.2 dB Differential input and output

schematic diagram vga to av

Abstract: AD8376ACPZ-REEL7 db40av AD8376 AD8376ACPZ-WP AD8376-EVALZ AD9445 ETC1-1-13
Contextual Info: Ultra Low Distortion IF Dual VGA AD8376 Preliminary Technical Data FUNCTIONAL BLOCK DIAGRAM FEATURES Dual Independent Digitally Controlled VGAs -4 to 20dB Gain Range 1 dB Step Size ± 0.2 dB Differential input and output 150 Ω Differential Input Open Collector Differential Output

Contextual Info: Ultralow Distortion IF Dual VGA AD8376 FUNCTIONAL BLOCK DIAGRAM FEATURES A4 A3 A2 A1 A0 Dual independent digitally controlled VGAs Bandwidth of 700 MHz −3 dB Gain range: −4 dB to +20 dB Step size: 1 dB ± 0.2 dB Differential input and output Noise figure: 8.7 dB @ maximum gain

AD8376

Abstract: D067 ETC1-1-13 0805LS-102XJBB AD6655 AD9246 AD9445 AD9640
Contextual Info: Ultralow Distortion IF Dual VGA AD8376 FEATURES FUNCTIONAL BLOCK DIAGRAM A4 A3 A2 A1 A0 Dual independent digitally controlled VGAs Bandwidth of 700 MHz −3 dB Gain range: −4 dB to +20 dB Step size: 1 dB ± 0.2 dB Differential input and output Noise figure: 8.7 dB @ maximum gain

max9291

Abstract: AD6643-200 CP-64-4 901MH AN83-5 10-com 1401M 10True
Contextual Info: Dual IF Receiver AD6643 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD AGND DRVDD AD6643 VIN+A VIN–A PIPELINE ADC 14 NOISE SHAPING REQUANTIZER 11 VCM VIN+B VIN–B PIPELINE ADC 14 NOISE SHAPING REQUANTIZER 11 DATA MULTIPLEXER AND LVDS DRIVERS DCO± D0±

E19 CORE TRANSFORMER

Abstract: CP-48-1 AD9524
Contextual Info: 80 MHz Bandwidth, Dual IF Receiver AD6673 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD DRVDD DVDD AGND DGND DRGND AD6673 VIN+A VIN–A PIPELINE 11-BIT ADC JESD-204B INTERFACE NSR VCM VIN+B VIN–B SYSREF± SYNCINB± CLK± RFCLK PIPELINE 11-BIT ADC HIGH

AD9250

Abstract: E19 CORE TRANSFORMER AD9524 upstream docsis cmts JESD204B
Contextual Info: 14-Bit, 170 MSPS/250 MSPS, JESD204B, Dual Analog-to-Digital Converter AD9250 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM DVDD AGND DGND DRGND AD9250 VIN+A VIN–A PIPELINE 14-BIT ADC VCM VIN+B VIN–B PIPELINE 14-BIT ADC JESD-204B INTERFACE SERDOUT0± CML, TX

max8895

Abstract: AD9613BCPZ-250
Contextual Info: FEATURES SNR = 69.6 dBFS at 185 MHz fIN and 250 MSPS SFDR = 86 dBc at 185 MHz fIN and 250 MSPS −149.9 dBFS/Hz input noise at 185 MHz, −1 dBFS AIN and 250 MSPS Total power consumption: 770 mW at 250 MSPS 1.8 V supply voltages LVDS ANSI-644 levels outputs

circuit diagram of analog clock using logic gates

Contextual Info: FEATURES SNR = 70.6 dBFS at 185 MHz AIN and 250 MSPS SFDR = 85 dBc at 185 MHz AIN and 250 MSPS −151.6 dBFS/Hz input noise at 185 MHz, −1 dBFS AIN and 250 MSPS Total power consumption: 785 mW at 250 MSPS 1.8 V supply voltages LVDS ANSI-644 levels outputs

AD951x

Contextual Info: Quad IF Receiver AD6657A Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD AGND DRVDD DRGND AD6657A VIN+A PIPELINE ADC VIN–A 14 NOISE SHAPING REQUANTIZER DO±AB VCMA VIN+B PIPELINE ADC VIN–B 14 NOISE SHAPING REQUANTIZER 11 VCMB VIN+C PIPELINE ADC VIN–C

AN-877

Abstract: ad9524
Contextual Info: IF Diversity Receiver AD6649 FEATURES APPLICATIONS SNR = 73.0 dBFS in a 95 MHz bandwidth at 185 MHz AIN and 245.76 MSPS SFDR = 85 dBc at 185 MHz AIN and 250 MSPS Noise density = −151.2 dBFS/Hz input at 185 MHz, −1 dBFS AIN and 250 MSPS Total power consumption: 1 W with fixed-frequency NCO,

AN-877 ANALOG DEVICES

Contextual Info: Dual IF Receiver AD6643 FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD AGND DRVDD AD6643 VIN+A VIN–A PIPELINE ADC 14 NOISE SHAPING REQUANTIZER 11 VCM VIN+B VIN–B PIPELINE ADC 14 NOISE SHAPING REQUANTIZER 11 DATA MULTIPLEXER AND LVDS DRIVERS DCO± D0± D10± OEB

40 nsr 120 rd

Abstract: AD951x
Contextual Info: Dual IF Receiver AD6642 FEATURES APPLICATIONS Communications Diversity radio and smart antenna MIMO systems Multimode digital receivers (3G) WCDMA, LTE, CDMA2000 WiMAX, TD-SCDMA I/Q demodulation systems General-purpose software radios FUNCTIONAL BLOCK DIAGRAM

Contextual Info: 16-Bit, 310 MSPS, 3.3 V/1.8 V Dual Analog-to-Digital Converter ADC AD9652 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD3 AVDD SDIO SCLK CSB DRVDD SPI AD9652 OR+, OR– PROGRAMMING DATA VIN+A DDR DATA INTERLEAVER LVDS OUTPUT DRIVER ADC VIN–A VREF SENSE

c619 DIODE

Abstract: R727 diode smd diode c521 smd diode C620 st c624 DIODE T901 transformer p953 TP903 CR701 smd diode c923
Contextual Info: Evaluation Board User Guide UG-232 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluating the AD6642/AD6657 Analog-to-Digital Converters FEATURES DOCUMENTS NEEDED Full featured evaluation board for the AD6642/AD6657

schematic diagram atx Power supply 500w

Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
Contextual Info: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455

AD951x

Abstract: JESD51-7 AD6657 AN-835 ANSI-644 BC-144-1 D10A JESD51-2 D3AB MO-205-AC
Contextual Info: Quad IF Receiver AD6657 FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD DRVDD DRGND AD6657 VIN+A PIPELINE ADC VIN–A 14 NOISE SHAPING REQUANTIZER PIPELINE ADC VIN–B 14 NOISE SHAPING REQUANTIZER 11 VCMB VIN+C PIPELINE ADC VIN–C 14 NOISE SHAPING REQUANTIZER DC0±AB

Contextual Info: Dual IF Receiver AD6643 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD AGND DRVDD AD6643 VIN+A VIN–A PIPELINE ADC 14 NOISE SHAPING REQUANTIZER 11 VCM VIN+B VIN–B PIPELINE ADC 14 NOISE SHAPING REQUANTIZER 11 DATA MULTIPLEXER AND LVDS DRIVERS DCO± D0±

Contextual Info: Dual IF Receiver AD6642 FUNCTIONAL BLOCK DIAGRAM FEATURES APPLICATIONS Communications Diversity radio and smart antenna MIMO systems Multimode digital receivers (3G) WCDMA, LTE, CDMA2000 WiMAX, TD-SCDMA I/Q demodulation systems General-purpose software radios

Contextual Info: IF Diversity Receiver AD6655 FEATURES APPLICATIONS SNR = 74.5 dBc 75.5 dBFS in a 32.7 MHz BW at 70 MHz @ 150 MSPS SFDR = 80 dBc to 70 MHz @ 150 MSPS 1.8 V analog supply operation 1.8 V to 3.3 V CMOS output supply or 1.8 V LVDS output supply Integer 1-to-8 input clock divider

Contextual Info: FEATURES FUNCTIONAL BLOCK DIAGRAM SNR = 70.6 dBFS at 185 MHz AIN and 250 MSPS SFDR = 85 dBc at 185 MHz AIN and 250 MSPS −151.6 dBFS/Hz input noise at 185 MHz, −1 dBFS AIN and 250 MSPS Total power consumption: 785 mW at 250 MSPS 1.8 V supply voltages LVDS ANSI-644 levels outputs

max8895

Abstract: PAGE31 AN501
Contextual Info: FEATURES FUNCTIONAL BLOCK DIAGRAM SNR = 69.6 dBFS at 185 MHz fIN and 250 MSPS SFDR = 86 dBc at 185 MHz fIN and 250 MSPS −149.9 dBFS/Hz input noise at 185 MHz, −1 dBFS AIN and 250 MSPS Total power consumption: 770 mW at 250 MSPS 1.8 V supply voltages LVDS ANSI-644 levels outputs