80286 data bus MD
Abstract: MD10 MD11 MD14 SD14 SD15 SS2222
Contextual Info: D A T A CONTROLLER _ S L 90 20 PRELIMINARY FEATURES • Supports 80386,80386 SX P9 , or 80286-based AT designs. • Data In to Data Out time is 15 ns. • 24 mA output buffers. • Includes MD, SD & XD buffers. • 16 bit data path can be vised as Low or H igh buffer.
|
OCR Scan
|
SL9020
80286-based
4160-B
9453S
80286 data bus MD
MD10
MD11
MD14
SD14
SD15
SS2222
|
PDF
|
Headland Technology Product Group
Abstract: headland headland technology 80386 microprocessor pin out diagram GC205 M240-M241 CC182 logical block diagram of 80286 headland 386 SPA21
Contextual Info: II GCK181 Universal PS/2 Chip Set Headland Technology Inc FEATURES d e s c r ip t io n • Universal Micro Channel Com patible chip set supporting the Intel 80286,386SX and 80386 to 25 MHz • Designed in 0.9 Micron channel length HCMOS and BiCMOS in Surface Mount Packages
|
OCR Scan
|
GCK181
386SX
20MHz
20MHz
Headland Technology Product Group
headland
headland technology
80386 microprocessor pin out diagram
GC205
M240-M241
CC182
logical block diagram of 80286
headland 386
SPA21
|
PDF
|
SM68512
Abstract: 68512
Contextual Info: RPR 1 5 13« SMART SM68512/68513 June 1990 Rev O HodularTechnologies SM68512/68513 4MBit 512Kx8 CMOS SRAM Module General Description Features The SM68512/68513 are high performance, 4-megabit static RAM modules organized as 512K words by 8 bits, in 32pin, dual-in-line (DIP) packages. The modules utilize four
|
OCR Scan
|
SM68512/68513
512Kx8)
32pin,
22/xF
SM68512
SM68513
68512
|
PDF
|