940 EEPROM Search Results

PRM111

Abstract: AC4424 PRM110 RF 2.4Ghz antenna LT2510 LT-2510 AC4868
Contextual Info: Wireless Development Kits Proprietary RF Modules Innovative Technology for a Connected World THE FASTEST WAY TO WIRELESS Size, speed, range, power consumption, and cost are all important issues to engineers integrating RF connectivity. Laird Technologies addresses these issues with compact

XH018

Contextual Info: 0.18 m Process Family: XH018 0.18 Micron Modular Analog Mixed HV Technology DESCRIPTION The XH018 series is X-FAB’s 0.18 micron Modular Mixed Signal HV CMOS Technology. Based upon the industrial standard single poly with up to six metal layers 0.18 micron

MH64D72KLH-10

Abstract: MH64D72KLH-75
Contextual Info: Preliminary Spec. MITSUBISHI LSIs Some contents are subject to change without notice. MH64D72KLH-75,-10 4,831,838,208-BIT 67,108,864-WORD BY 72-BIT Double Data Rate Synchronous DRAM Module DESCRIPTION The MH64D72KLH is 67108864 - word x 72-bit Double Data Rate(DDR) Sy nchronous DRAM mounted module.

M470L1714BT0

Contextual Info: M470L1714BT0 200pin DDR SDRAM SODIMM 128MB DDR SDRAM MODULE 16Mx64 based on 8Mx16 DDR SDRAM 200pin SODIMM 64-bit Non-ECC/Parity Revision 0.1 June. 2001 Rev. 0.1 June. 2001 M470L1714BT0 200pin DDR SDRAM SODIMM Revision History Revision 0.0 (Apr. 2001) 1. First release.

MT4VDDT1664HY-335

Abstract: MT46V32M16 MT46V16M16
Contextual Info: 64MB, 128MB, 256MB x64, SR 200-Pin DDR SDRAM SODIMM Features DDR SDRAM SODIMM MT4VDDT864H – 64MB1 MT4VDDT1664H – 128MB MT4VDDT3264H – 256MB For component data sheets, refer to Micron’s Web site: www.micron.com Figure 1: Features • 200-pin, small-outline, dual in-line memory module

8S2 EIAJ SOIC

Abstract: AT59C13W-10SI AT59C11 AT59C11-10PC AT59C11-10PI AT59C11W-10SC AT59C13 AT59C22
Contextual Info: Features • Low Voltage and Standard Voltage Operation • • • • • – 5.0 VCC = 4.5V to 5.5V – 2.7 (VCC = 2.7V to 5.5V) – 2.5 (VCC = 2.5V to 5.5V) User Selectable Internal Organization – 1K: 128 x 8 or 64 x 16 – 2K: 256 x 8 or 128 x 16

AT24C21

Abstract: MS-001 atmel 228
Contextual Info: Features • • • • • • • • • • • 2-wire Serial Interface Schmitt Trigger, Filtered Inputs For Noise Suppression DDC1 / DDC2™ Interface Compliant for Monitor Identification Low-voltage Operation – 2.5 VCC = 2.5V to 5.5V Internally Organized 128 x 8

AT24C512

Abstract: AT24C512-10PC AT24C512-10UC AT24C512C1-10CC AT24C512C1-10CI AT24C512W1-10SC atmel at24c512 Atmel 122
Contextual Info: Features • Low-voltage and Standard-voltage Operation • • • • • • • • • • • – 5.0 VCC = 4.5V to 5.5V – 2.7 (VCC = 2.7V to 5.5V) – 1.8 (VCC = 1.8V to 3.6V) Internally Organized 65,536 x 8 2-wire Serial Interface Schmitt Triggers, Filtered Inputs for Noise Suppression

MA2180

Abstract: intel socket 423 pin assignments
Contextual Info: 64Mx72 bits PC100 SDRAM Registered DIMM with PLL, based on 64Mx4 SDRAM with LVTTL, 4 banks & 8K Refresh HYM72V64C756B L T4 Series DESCRIPTION The HYM72V64C756B(L)T4 -Series are high speed 3.3-Volt synchronous dynamic RAM Modules composed of eighteen 64Mx4 bit Synchronous DRAMs in 54-pin TSOPII, two 48-pin SOP Register Buffers, one 24-pin SOP PLL and 8-pin

Contextual Info: HN28F101 Series 1M 128K x 8-bit Flash Memory • DESCRIPTION The Hitachi HN28F101 is a 1-Megabit CMOS Fiash Memory organized as 131,072 x 8-bit. The HN28F101 is cap ab le o f in -syste m e le ctrica l chip erasure and reprogramming. The HN28F101 programs and erases data with a 12 V

AT25HP256

Abstract: AT25HP512 X101 X110
Contextual Info: Features • • • • • • • • • Serial Peripheral Interface SPI Compatible Supports SPI Modes 0 (0,0) and 3 (1,1) 10 MHz Clock Rate 128-Byte Page Mode Only for Write Operations Low-Voltage and Standard-Voltage Operation – 5.0 (VCC = 4.5V to 5.5V)

Contextual Info: 64MB, 128MB, 256MB x64 200-PIN DDR SDRAM SODIMM SMALL-OUTLINE DDR SDRAM DIMM MT4VDDT864H – 64MB MT4VDDT1664H – 128MB MT4VDDT3264H – 256MB For the latest data sheet, please refer to the Micronâ Web site: www.micron.com/moduleds Features Figure 1: 200-Pin SODIMM (MO-224)

BSC 59C

Contextual Info: ¿lmËL Features • Low Voltage and Standard Voltage Operation - 5.0 Vcc = 4.5V to 5.5V - 2.7 (Vcc = 2.7V to 5.5V) - 2.5 (Vcc = 2.5V to 5.5V) • User Selectable Internal Organization - 1K: 1 2 8 x 8 or 6 4 x 1 6 - 2K: 2 5 6 x 8 or 1 2 8 x 1 6 - 4K: 5 1 2 x 8 or 2 5 6 x 1 6

Contextual Info: 200PIN DDR266 Unbuffered SO-DIMM 512MB With 32Mx16 CL2.5 TS64MSD64V6M Description Placement The TS64MSD64V6M is a 32M x 64bits Double Data Rate SDRAM high-density for DDR266.The TS64MSD64V6M consists of 8pcs CMOS 32Mx16 bits Double Data Rate SDRAMs in 66 pin TSOP-II 400mil

ddr2 5300

Abstract: cs 1694 DDR2-400 DDR2-533 HYS72T32000GR HYS72T64001GR HYS72T64020GR PC2-3200 PC2-3200R
Contextual Info: Da ta Sh e et , V 0. 2 2, Fe b. 2 00 4 H YS72 T 320 00 GR 2 56 M B y t e H YS72 T 640 01 GR (5 12 M B y t e ) H YS72 T 640 20 GR (5 12 M B y t e ) DDR 2 Reg istered D IMM Modu les M em or y P r od uc t s N e v e r s t o p t h i n k i n g . HYS72T32000GR, HYS72T64001GR

at24c256

Contextual Info: Features * Low Voltage and Standard Voltage Operation - 5.0 Vcc = 4.5V to 5.5V - 2.7 (Vcc = 2.7V to 5.5V) - 1.8 (Vcc = 1.8V to 3.6V) * Internally Organized 16,384 x 8 and 32,768 x 8 • 2-Wire Serial Interface * Schmitt Trigger, Filtered Inputs for Noise Suppression

AT24C21

Contextual Info: Features • • • • • • • • • • • 2-W ire Serial Interface Schm itt Trigger, Filtered Inputs For Noise Suppression DDC1 / DDC2™ Interface Com pliant for Monitor Identification Low Voltage Operation - 2.5 Vcc = 2.5V to 5.5V Internally Organized 128 x 8

Contextual Info: Prelim inary CAT506 12 Bit, 40MHz D/A Converter FEATURES APPLICATIONS • 25 ns maximum settling time 1/2 LSB ■ Arbitrary Waveform Generators ■ 40 MHz update rate ■ Direct Digital Synthesis (DDS) ■ 1/2 LSB Integral Non-Linearity ■ High Resolution A/D Converters

PC2-5300

Abstract: DDR2-533 DDR2-667 SSTL-18
Contextual Info: NT1GT64UH8B0MN 1GB : 128M x 64 PC2-4200 / PC2-5300 Unbuffered DDR2 SO-DIMM 200 pin Unbuffered DDR2 SO-DIMM Based on 64Mx16 DDR2 SDRAM 1Gb B-Die Features • 200-Pin Small Outline Dual In-Line Memory Module SO-DIMM • 128Mx64 Unbuffered DDR2 SO-DIMM based on 64Mx16 DDR2

MT41J256M16

Abstract: MT4J128M16 MT4JTF25664AZ-1G6E1 ddr3 udimm spd ddr3 udimm MT41J128M16
Contextual Info: 1GB, 2GB x64, SR 240-Pin DDR3 UDIMM Features DDR3 SDRAM UDIMM MT4JTF12864AZ – 1GB MT4JTF25664AZ – 2GB Features Figure 1: 240-Pin UDIMM (MO-269 R/C C) • DDR3 functionality and operations supported as defined in the component data sheet • 240-pin, unbuffered dual in-line memory module

MH64D72KLG-10

Abstract: MH64D72KLG-75
Contextual Info: Preliminary Spec. MITSUBISHI LSIs Some contents are subject to change without notice. MH64D72KLG-75,-10 4,831,838,208-BIT 67,108,864-WORD BY 72-BIT Double Data Rate Synchronous DRAM Module DESCRIPTION The MH64D72KLG is 67108864 - word x 72-bit Double Data Rate(DDR) Sy nchronous DRAM mounted module.

MH64D72KTG-10

Abstract: MH64D72KTG-75
Contextual Info: Preliminary Spec. MITSUBISHI LSIs Some contents are subject to change without notice. MH64D72KTG-75,-10 4,831,838,208-BIT 67,108,864-WORD BY 72-BIT Double Data Rate Synchronous DRAM Module DESCRIPTION The MH64D72KTG is 67108864 - word x 72-bit Double Data Rate(DDR) Sy nchronous DRAM mounted module.

LR36B03

Abstract: LR35504 smoke alarm ic 555 PCB layout LQ080Y5DW30 LQ050T5DG01 LK400d3 LQ080Y5DW01 LQ080Y5DE30 453 8pin opto SHARP BS2F7VZ7395
Contextual Info: CONTENTS Sharp Efforts Towards a Green Society . 2 TFT OPTOELECTRONICS LCD Modules . 8 LSI REG RF Analog CMOS IMAGE SENSORS CMOS Camera Modules Road Map . 13

Contextual Info: Features • Serial Peripheral Interface SPI Compatible • Supports SPI Modes 0 (0,0) and 3 (1,1) • Low-Voltage and Standard-Voltage Operation - 5.0 (Vcc = 4.5V to 5.5V) - 2.7 (Vcc = 2.7V to 5.5V) - 1.8 (Vcc = 1.8V to 3.6V) • 2.1 MHz Clock Rate (5V) Compatibility