80LJ Search Results

Contextual Info: Lattice ispLSr 1032 H I Semiconductor •■■ Corporation In-System Programmable High Density PLD Functional Block Diagram Features • HIGH-DENSITY PROGRAMMABLE LOGIC — High Speed Global Interconnect — 6000 PLD Gates — 64 I/O Pins, Eight Dedicated Inputs

Contextual Info: Latticc ispLSI and pLSI 2032 ; ; ; Semiconductor •■■ Corporation High Density Programmable Logic Functional Block Diagram Features • HIGH DENSITY PROGRAMMABLE LOGIC — — — — — 1000 PLD Gates 32 I/O Pins, Two Dedicated Inputs 32 Registers High Speed Global Interconnect

plsi1016

Abstract: 1016j ispLSI1016 1016E
Contextual Info: Lattice* ispLSI andpLSI 1016E “ ; Semiconductor •■■Corporation High-Density Programmable Logic Features Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — 2000 PLD Gates — 32 I/O Pins, Four Dedicated Inputs — 96 Registers — High-Speed Global Interconnect

Contextual Info: Lattice* ispLSI andpLSI 1016E “ ; Semiconductor •■■Corporation High-Density Programmable Logic Features Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — 2000 PLD Gates — 32 I/O Pins, Four Dedicated Inputs — 96 Registers — High-Speed Global Interconnect

Contextual Info: International IOR Rectifier PD - 9 .1461C IRG4PC30U PRELIMINARY UltraFast Speed IGBT INSULATED GATE BIPOLAR TRANSISTOR Features • UltraFast: Optimized for high operating frequencies 8-40 kHz in hard switching, >200 kHz in resonant mode • Generation 4 IGBT design provides tighter

plsi1016

Contextual Info: Lattice ; " Semiconductor •■■Corporation ispLSI and pLSI 1016E High-Density Programmable Logic Features Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — — — — — 2000 PLD Gates 32 I/O Pins, Four Dedicated Inputs 96 Registers High-Speed Global Interconnect

Contextual Info: Lattice \ ispLSr and pLSr 1016E C orporation10'' High-Density Program m able Logic Functional Block Diagram Features • HIGH-DENSITY PROGRAMMABLE LOGIC — 2000 PLD Gates — 32 I/O Pins, Four Dedicated Inputs — 96 Registers — High-Speed Global Interconnect

Contextual Info: Lattice* ispLSI andpLSI 1016E “ ; Semiconductor •■■Corporation High-Density Programmable Logic Features Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — 2000 PLD Gates — 32 I/O Pins, Four Dedicated Inputs — 96 Registers — High-Speed Global Interconnect