AT89C5131
Abstract: 80C51 80C52X2 AT83C5134 AT83C5135 AT83C5136 MLF48 QFN32 TQFP64 at24C04 code example assembly
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART), TxD and Rxd are 5 Volt Tolerant
|
Original
|
80c52x216-bit8/16/32-kbyte32-kbyte+1212mbps32-byte7683bat89c513180c51at83c5134at83c5135at83c5136mlf48qfn32tqfp64at24c04 code example assembly
|
PDF
|
atmel 80C52X2
Abstract: 80C52X2 AT89C5131A-RD at89c5131 parallel programmer AT89C5131 PLCC 52 AT89C5131 80C51 80C52 AT89C5131A-L PLCC52
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2
|
Original
|
80c52x216-bit16/32-kbyte4338e+9atmel 80c52x2at89c5131a-rdat89c5131 parallel programmerat89c5131 plcc 52at89c513180c5180c52at89c5131a-lplcc52
|
PDF
|
AT89C5130A-M
Abstract: 80C52X2 AT89C5131 UCAP PLCC52 QFN32 VQFP64 80C51 80C52 AT89C5131A-M AT89C5131A-PUTUM
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2
|
Original
|
80c52x216-bit16/32-kbyte4337g+9at89c5130a-mat89c5131 ucapplcc52qfn32vqfp6480c5180c52at89c5131a-mat89c5131a-putum
|
PDF
|
|
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART), TxD and Rxd are 5 Volt Tolerant
|
Original
|
80c52x216-bit8/16/32-kbyte32-kbyte+312mbps32-byte7683c
|
PDF
|
AT89c5131 A-M
Abstract: AT89C5130-31 AT89C5130 AT89C5131 80C51 80C52 80C52X2 AT89C5130A-M AT89C5131A-M PLCC52
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2
|
Original
|
80c52x224mhz16-bit16/32-kbyte+9at89c5131 a-mat89c5130-31at89c5130at89c513180c5180c52at89c5130a-mat89c5131a-mplcc52
|
PDF
|
80c52x2
Abstract: 80C32X2 80C31X2 89C54 87C51X2 80C54X2 89C51X2 80c32x2 data sheet 87C52X2 80C51X2
Contextual Info: 80C51X2 microcontrollers 80C31X2, 80C32X2, 80C51X2, 80C52X2, 80C54X2, 80C58X2, 87C51X2, 87C52X2, 87C54X2, 87C58X2, 89C51X2, 89C52X2, 89C54X2, 89C58X2 Semiconductors Description The Philips X2 family of microcontrollers is based on a high-performance static 80C51 design fabricated with Philips high-density CMOS technology
|
Original
|
80c51x280c31x280c32x280c52x2+880c54x280c58x287c51x287c52x287c54x289c5489c51x280c32x2 data sheet
|
PDF
|
2x6 KEYPAD 12 pin
Abstract: AT83EC5136
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART), TxD and Rxd are 5 Volt Tolerant
|
Original
|
80c52x216-bit8/16/32-kbyte32-kbyte+612mbps32-byte64-byte7683b2x6 keypad 12 pinat83ec5136
|
PDF
|
at89c5131 parallel programmer
Abstract: AT83EI5136
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART), TxD and Rxd are 5 Volt Tolerant
|
Original
|
80c52x216-bit8/16/32-kbyte32-kbyte+512mbps32-byte64-byteat89c5131 parallel programmerat83ei5136
|
PDF
|
atmel 80C52X2
Abstract: 80c52x2 80c52x2 Atmel atmel 80C52 MLF48 AT89C5131A-M 80C52X2 CPU instruction set 80C51 80C52 AT89C5131A-L
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2
|
Original
|
80c52x224mhz16-bit32-kbyte+1032-byteatmel 80c52x280c52x2 atmelatmel 80c52mlf48at89c5131a-m80c52x2 cpu instruction set80c5180c52at89c5131a-l
|
PDF
|
at89c5131
Abstract: AT89C5131 PLCC 52 80C51 80C52 80C52X2 MLF48 PLCC52 VQFP64 at89c5131 parallel programmer at89c5131 usb interface code example
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2
|
Original
|
80c52x224mhz16-bit32-kbyte+1132-byte4136cat89c5131at89c5131 plcc 5280c5180c52mlf48plcc52vqfp64at89c5131 parallel programmerat89c5131 usb interface code example
|
PDF
|
AT89C5131
Abstract: atmel 80C52X2 at89c5131 parallel programmer at89c5131 usb interface code example
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2
|
Original
|
80c52x224mhz16-bit32-kbyte+632-byte4136bat89c5131atmel 80c52x2at89c5131 parallel programmerat89c5131 usb interface code example
|
PDF
|
atmel 80C52X2
Abstract: at89c5131 parallel programmer AT89C5131A-S3SUM AT89C5131A Electrical Life Test
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2
|
Original
|
80c52x216-bit16/32-kbyte4337j+4atmel 80c52x2at89c5131 parallel programmerat89c5131a-s3sumat89c5131a electrical life test
|
PDF
|
AT89C5131A-M
Abstract: at89c5131 parallel programmer AT89C5131 UCAP AT89C5131 AT89C5131 PLCC 52 80C51 80C52 80C52X2 PLCC52 QFN32
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2
|
Original
|
80c52x224mhz16-bit32-kbyte+1032-byteat89c5131a-mat89c5131 parallel programmerat89c5131 ucapat89c5131at89c5131 plcc 5280c5180c52plcc52qfn32
|
PDF
|
Microcontroller
Abstract: atmel 80C52X2 watch dog timer of 8051 AT89C5130A AT89C5130 AT89C5131 UCAP 80C51 80C52 80C52X2 AT89C5131A-M
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2
|
Original
|
80c52x216-bit16/32-kbyte4337k+9microcontrolleratmel 80c52x2watch dog timer of 8051at89c5130aat89c5130at89c5131 ucap80c5180c52at89c5131a-m
|
PDF
|
|
|
at24C04 code example assembly
Abstract: at89c5131 AT83C5134 AT83C5136 80C51 80C52X2 AT83C5135 MLF48 QFN32 TQFP64
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART), TxD and Rxd are 5 Volt Tolerant
|
Original
|
80c52x216-bit8/16/32-kbyte32-kbyte+1212mbps32-byte7683cat24c04 code example assemblyat89c5131at83c5134at83c513680c51at83c5135mlf48qfn32tqfp64
|
PDF
|
at89c5131 parallel programmer
Abstract: 80C51 80C52 80C52X2 AT89C5131A-L PLCC52 VQFP64 atmel 80C52X2
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2
|
Original
|
80c52x224mhz16-bit32-kbyte+84338bat89c5131 parallel programmer80c5180c52at89c5131a-lplcc52vqfp64atmel 80c52x2
|
PDF
|
atmel 80C52X2
Abstract: at89c5131 parallel programmer 80C52X2 80C51 80C52 AT89C5131A-L PLCC52 VQFP64 at89c5131a-tisul
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2
|
Original
|
80c52x216-bit16/32-kbyte4338d+8atmel 80c52x2at89c5131 parallel programmer80c5180c52at89c5131a-lplcc52vqfp64at89c5131a-tisul
|
PDF
|
at89c5131 parallel programmer
Abstract: AT89C5131A-M AT89C5131AM at89c5131 usb interface code example atmel 80C52X2
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2
|
Original
|
80c52x224mhz16-bit32-kbyte+632-byteat89c5131 parallel programmerat89c5131a-mat89c5131amat89c5131 usb interface code exampleatmel 80c52x2
|
PDF
|
atmel 80C52X2
Abstract: 80C52X2 CPU instruction set AT89C5131 UCAP AT89C5131 AT89C5131A usb eeprom programmer schematic 80C51 80C52 80C52X2 AT89C5130A-M
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2
|
Original
|
80c52x216-bit16/32-kbyte4337d+9atmel 80c52x280c52x2 cpu instruction setat89c5131 ucapat89c5131at89c5131ausb eeprom programmer schematic80c5180c52at89c5130a-m
|
PDF
|
at89c5131 parallel programmer
Abstract: AT89C5131 important activities for sslc usb eeprom programmer schematic 80C51 80C52 80C52X2 AT89C5131A-L PLCC52 VQFP64
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2
|
Original
|
80c52x224mhz16-bit32-kbyte+104338bat89c5131 parallel programmerat89c5131important activities for sslcusb eeprom programmer schematic80c5180c52at89c5131a-lplcc52vqfp64
|
PDF
|
AT89C5130A-M
Abstract: format .pof stl 106 a QFP64 package 80C52X2 CPU instruction set atmel bootloader C51 3 x 4 keypad to 7 segment decoder uep 49 AT89C5131 UCAP atmel 80C52X2
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2
|
Original
|
80c52x216-bit16/32-kbyte4337f+10at89c5130a-mformat .pofstl 106 aqfp64 package80c52x2 cpu instruction setatmel bootloader c513 x 4 keypad to 7 segment decoderuep 49at89c5131 ucapatmel 80c52x2
|
PDF
|
atmel 80C52X2
Abstract: at89c5131 parallel programmer 80C51 80C52 80C52X2 AT89C5131A-L PLCC52 VQFP64
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2
|
Original
|
80c52x216-bit32-kbyte4338c+7atmel 80c52x2at89c5131 parallel programmer80c5180c52at89c5131a-lplcc52vqfp64
|
PDF
|
80C51
Abstract: 80C52 80C52X2 AT89C5130A-M AT89C5131A-M PLCC52 QFN32 VQFP64 at89c5131 parallel programmer atmel 80C52X2
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2
|
Original
|
80c52x216-bit16/32-kbyte4337e+980c5180c52at89c5130a-mat89c5131a-mplcc52qfn32vqfp64at89c5131 parallel programmeratmel 80c52x2
|
PDF
|
AT89C5131
Abstract: atmel 80C52X2 80C51 80C52 80C52X2 AT89C5130A-M AT89C5131A-M PLCC52 QFN32 VQFP64
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2
|
Original
|
80c52x216-bit16/32-kbyte4337i+9at89c5131atmel 80c52x280c5180c52at89c5130a-mat89c5131a-mplcc52qfn32vqfp64
|
PDF
|
