7C330 Search Results

L496D

Abstract: 9l reset CY7C331 ST L11922 0423-J
Contextual Info: CY7C331 -W C Y P R E S S Asynchronous Registered EPLD Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coining from the I/O pin — Independent product term set,

Contextual Info: 7C330 C Y P R E S S •0 Features • Twelve I/O macrocells each having: — registered, three-state I/O pins — input register clock select multi­ plexer — feed back multiplexer — output enable OE multiplexer • All twelve macrocell state registers

Contextual Info: Asynchronous Registered EPLD 13 inputs, 12 feedback VO pins, plus 6 shared I/O macrocell feedbacks for a total of 31 true and complementary inpnts High speed: 20 ns maximum tpo Security bit Space-saving 28-pin slim-line DIP package; also available in 28-pin

7c331-35

Contextual Info: s :^é= , CY7C331 •jS QYPRESS -■ W SEMICONDUCTOR Asynchronous Registered EPLD Features • TVelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coining from the I/O pin — Independent product term set,

7C241

Abstract: 7c471 7C121 7C820K 7C221 7C390K 6861K 90K110 5C56 12C-390K
Contextual Info: METAL OXIDE VARISTORS TNR Chip Type For Direct Surface Mounting 5C and 7C Type ?RATINGS Operating Temperature Range: -40K+125C Storage Temperature Range: -50K+150C Maximum Applied Voltage (Continuous) AC. (Vrms) DC. (V) 18 14 22 17 26 20 30 25 37 30 44

TCO - 909 F 10 MHz

Abstract: TCO - 909 C335 CY7C335 TCO - 909 F C335A
Contextual Info: CY7C335 CYPRESS Features • 100-MHz output registered operation • Twelve I/O macrocells, each having: — Registered, three-state I/O pins — Input and output register clock se­ lect multiplexer — Feed back multiplexer — Output enable OE multiplexer

Contextual Info: 7C330: Saturday, January 4, 1992 Revision: October 19, 1995 7C330 Features D Twelve I/O macrocells each having: Ċ registered, threeĆstate I/O pins Ċ input register clock select multiĆ plexer D Ċ feed back multiplexer Ċ output enable OE multiplexer

Contextual Info: This is an abbreviated datasheet. Contact a Cypress representative for complete specifications. For new designs, please refer to the CY7C33S. 7C330 CMOS Programmable Synchronous State Machine CYPRESS SEMICONDUCTOR Features Three separate clocks— two inputs,

CY7C330

Contextual Info: fax id: 6019 1CY 7C33 0 7C330 CMOS Programmable Synchronous State Machine • 66-MHz operation — 3-ns input set-up and 12-ns clock to output Features • Twelve I/O macrocells each having: — registered, three-state I/O pins — 15-ns input register clock to state register clock

TCO - 909 F 10 MHz

Abstract: TCO - 909 F CERAMIC LEADLESS CHIP CARRIER C335 CY7C335
Contextual Info: CY7C335 CYPRESS Features • 100-MHz output registered operation • Twelve I/O macrocells, each having: — Registered, three-state I/O pins — Input and output register clock se­ lect multiplexer — Feed back multiplexer — Output enable OE multiplexer

C3317

Abstract: L1190 CY7331
Contextual Info: Asynchronous Registered EPLD Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coming from the I/O pin — Independent product term set, reset, and clock inputs on all

Contextual Info: CY7C332 CYPRESS Features • 12 I/O macrocells each having: — Registered, latched, or transparent array input — A choice of two clock sources — Global or local output enable OE — Up to 19 product term s (PTs) per output — Product term (PT) output polarity

Contextual Info: CY7C331 CYPRESS — . = SEMICONDUCTOR Asynchronous Registered EPLD T\velve I/O macrocells each having: — One state flip-flop with an XOR sura-of-products input — One feedback flip-flop with input coming from the I/O pin — Independent product term set,

Contextual Info: _ CY7C335 Universal Synchronous EPLD SEMICONDUCTOR Features • 100-MHz output registered operation • Twelve I/O macrocells, each having: — Registered, three-state I/O pins — Input and output register clock se­ lect multiplexer

Contextual Info: fax id: 6019 CMOS Programmable Synchronous State Machine Features • Twelve I/O macrocells each having: — registered, three-state I/O pins — Input register clock select multiplexer — feed back multiplexer — output enable OE multiplexer • All twelve macrocell state registers can be hidden

cy7c9101

Abstract: CY2901 CY7C190 PLD20RA10 CY2149 CY7C122 CY7C148 CY7C149 CY7C150 22V10-Macrocell
Contextual Info: Military Product Selector Guide Static RAMs Size Organization 64 64 1K 1K 4K 4K 4K 4K 4K 8K 8K 16K 16K 16K 16K 16K 16K 16K 16K 16K 32K 32K 32K 32K 32K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 256K 256K 256K 256K 256K 256K 256K 1M 1M

CY7C330-50TMB

Abstract: CY7C330 7C330
Contextual Info: 7C330 '# C Y P R E S S Features • TVelve I/O macrocells each having: — registered, three-state I/O pins — input register clock select multi­ plexer — feed back multiplexer — output enable OE multiplexer • All twelve macrocell state registers

cy7c330

Contextual Info: 7C330 CYPRESS SEMICONDUCTOR CMOS Programmable Synchronous State Machine Features • 256 product terms— 32 per pair of macro cells, variable distribution 12 I /O macro cells each having: — registered, three-state I /O pins — input register clock select

D-A53

Abstract: 14l8 PALC22 cypress 22V10 22V10
Contextual Info: CYPRESS SEMICONDUCTOR , P L D Programming Information Introduction Programmable Technology P L D s o r P ro g ram m ab le Logic Devices provide an a ttra c t­ ive altern ativ e to logic im plem ented w ith discrete devices. Because th e p rim ary requirem ents for this logic has been to

EI24

Abstract: GI05 st C331 n 332 ab EI-24
Contextual Info: _ ~ 2 r CY7C331 •^CYPRESS Features • 13 inputs, 12 feedback I/O pins, plus 6 • Twelve I/O macrocells each having: — One stale flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coming from the I/O pin — Independent product term set,

c677

Contextual Info: I U J O J . / / 1 0 /9 1 Revision: Friday, March 2 6 ,1993b M fP ? 1993 CY7C335 7J s CYPRESS SEMICONDUCTOR Universal Synchronous EPLD construct very high performance state ma­ chines. The architecture of the CY7C335, consist­ ing of the user-configurable output macrocell, bidirectional I/O capability, input reg­

Contextual Info: CY7C335 / CYPRESS Features • 100-MHz output registered operation • Twelve I/O macrocells, each having: — Registered, three-state I/O pins — Input and output register clock se­ lect m ultiplexer — Feed back multiplexer — Output enable OE multiplexer

C3325

Abstract: l9618 L9680 C3326 L9622 l9742 tunel C3321
Contextual Info: C YP RE SS SEMICONDUCTOR a ML.E D 2S 0^bb2 GQQ7Q33 S Q C Y P "T" ^ ^ CYPRESS SEMICONDUCTOR CY7C332 Registered Combinatorial EPLD 13 input macrocells, each having: — Complementary input — Register, latch, or transparent access — I\vo clock sources 15 ns tpo max.

7C471

Abstract: 12C15 7C241 *7C471 TNR 390 7C361 TNR5C271K
Contextual Info: METAL OXIDE VARISTORS TNR Chip Type For Direct Surface Mounting 5C and 7C Type ?RATINGS Operating Temperature Range: -40K+125C Storage Temperature Range: -50K+150C Maximum Applied Voltage (Continuous) AC. (Vrms) DC. (V) 18 14 22 17 26 20 30 25 37 30 44