784K Search Results

Contextual Info: REV. S t a t u s HDSL tran sform er for use with Brooktree HDSL IC chips BT8970/BT8921 at 784kbps rate PRELIMINARY 01/12/00 NS PRELIMINARY 1 CHANGED ISO, E, A.6.~A.13. 02/1 4 /0 0 MP A. Electrical Specifications 2 5 ° C 1. Prim ary Line side) Im pedance; 135fi

cl522

Abstract: BT8970 BT8952 SK70704 tht1
Contextual Info: HDSL BEIJING CORELOGIC COMMUNICATION CO.LTD Compliance with the ANSI & ETSI Standard Excellent THD performance Operating Temperature Range -20 to 75 Inductance Line Side DC Current Capability mH (mA) 2CT:1:1 2.0 6% 1168Kbps(2 pairs) 1CT:1:1 BT8952 784Kbps(2 pairs)

ADSL 50012

Contextual Info: 1 IVidcom xDSL Transform ers 1C Mfr 1C Number UL1459 | SMD | Pkg TH HDSL - - - - - - 50302 EFD20 Level One S K70704/70707 1168Kbps 50245 50351 EP13 50504 50493 EP13 Level One S K70704/70706 784Kbps 50229 50350 EP13 50503 50492 EP13 Level One SK70720/70721

Contextual Info: 784K Diodes Silicon Rectifier Military/High-RelN I O Max.(A) Output Current650 @Temp (øC) (Test Condition)150# V(RRM)(V) Rep.Pk.Rev. Voltage500 I(FSM) Max.(A) Pk.Fwd.Sur.Cur.8.0k V(FM) Max.(V) Forward Voltage1.3 @I(FM) (A) (Test Condition)500 @Temp. (øC) (Test Condition)150#

56-PIN

Abstract: AFE1105 AFE1115 AFE1115E E1784
Contextual Info: AFE 111 AFE1115 ® 5 HDSL/MDSL ANALOG FRONT END WITH VCXO ● +5V ONLY 5V or 3.3V Digital ● SCALEABLE DATA RATE ● 300mW POWER DISSIPATION FEATURES ● COMPLETE HDSL ANALOG INTERFACE ● E1, T1 AND MDSL OPERATION ● 56-PIN SSOP ● VCXO AND VCXO CONTROL CIRCUITRY

48-PIN

Abstract: AFE1103 AFE1103E
Contextual Info: AFE AFE1103 110 3 HDSL/MDSL ANALOG FRONT END FEATURES DESCRIPTION ● COMPLETE ANALOG INTERFACE Burr-Brown’s Analog Front End greatly reduces the size and cost of an HDSL or MDSL system by providing all of the active analog circuitry needed to connect

R5F61653RN50FPV

Abstract: Nippon capacitors ir receiver module sj 1838 P012 World transistors R5F61653RFPV R5F61654RFPV IFR 2945 SERVICE MANUAL sc 1287
Contextual Info: To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid

Contextual Info: XRT8001 WAN Clock for T1 and E1 Systems October 2001-1 GENERAL DESCRIPTION • Generates Output Clock Frequencies Ranging The XRT8001 WAN Clock is a dual-phase-locked loop chip that generates two very low jitter output clock signals that can be used for synchronization clocks in

Contextual Info: B U R R -B R O W N AFE1203 2Mbps, Single Pair HDSL ANALOG FRONT END FEATURES • • • • • • • • E1/T1 SINGLE PAIR 2B1Q OPERATION COMPLETE ANALOG INTERFACE 385mW POWER DISSIPATION PROGRAMMABLE POWER 48-LEAD SSOP PACKAGE SCALEABLE DATA RATE OPERATION FROM 2.3Mbps TO 160kbps

R5F61668RFPV

Abstract: R5F61664RFPV R5F61668RN50FPV R5F61663RFPV A18E A1719 transistor NEC D 587 lsi tms 1951 nl 1117 3.3 DKC mark
Contextual Info: REJ09B0412-0200 The revision list can be viewed directly by clicking the title page. The revision list summarizes the locations of revisions and additions. Details should always be checked by referring to the relevant text. 32 H8SX/1668R Group, H8SX/1668M Group

DIGITAL ECHO pcb

Abstract: 48-PIN AFE1105 AFE1105E AFE1105EA
Contextual Info: AFE AFE1105 110 5 HDSL/MDSL ANALOG FRONT END FEATURES DESCRIPTION ● COMPLETE ANALOG INTERFACE ● T1, E1, AND MDSL OPERATION Burr-Brown’s Analog Front End greatly reduces the size and cost of an HDSL or MDSL system by providing all of the active analog circuitry needed to connect

AFE1124

Abstract: AFE1144 AFE1144E SSOP-28
Contextual Info: AFE1144 AFE 114 4 For most current data sheet and other product information, visit www.burr-brown.com HDSL /MDSL ANALOG FRONT END ● 64kbps TO 1168kbps OPERATION ● SCALABLE DATA RATE FEATURES ● LOWER OUT OF BAND PSD ● 250mW POWER DISSIPATION ● +5V POWER 5V or 3.3V Digital

508K

Abstract: F70 Package fujitsu lvds standard MCM NAND CE61 404k bga HQFP 208 026K
Contextual Info: October 1996 Edition 2.0 DATA SHEET CE61 SERIES 0.35 MICRON HIGH PERFORMANCE/LOW POWER CMOS EMBEDDED ARRAYS DESCRIPTION The Fujitsu CE61 is a series of high performance CMOS embedded arrays featuring full support of diffused high-speed RAMS, ROMS and embedded functions. The CE61 offers

AFE1124

Contextual Info: AFE 212 AFE2124 4 For most current data sheet and other product information, visit www.burr-brown.com Dual HDSL/SDSL ANALOG FRONT END FEATURES DESCRIPTION ● SERIAL DIGITAL INTERFACE ● 48-LEAD SSOP PACKAGE Burr-Brown’s dual Analog Front End chip greatly reduces the size and cost of a DSL Digital Subscriber

ic 0941

Abstract: BT8952 BT8960 HPT-100A HPT-110A HPT-120A HPT-130A HPT-140A
Contextual Info: HPT Series - HDSL Transformers Features • • complies with ANSI and ETSI requirements matched to all leading chip sets • • very low THD permits maximum loop lengths 1500V minimum isolation • excellent quality at competitive price due to high volume production

Contextual Info: CE61 Series Embedded Array ▼ 0.28µm Leff Features 0.28µm Leff 0.35µm drawn Propagation delay of 85 ps Mixed-signal macros–A/D and D/A converters High density diffused RAMs and ROMs Separate core and I/O supply voltages I/Os–5V, 3.3V and 5V tolerant

AFE1124

Contextual Info: AFE AFE2124 212 4 For most current data sheet and other product information, visit www.burr-brown.com Dual HDSL/SDSL ANALOG FRONT END FEATURES DESCRIPTION ● SERIAL DIGITAL INTERFACE ● 48-LEAD SSOP PACKAGE Burr-Brown’s dual Analog Front End chip greatly reduces the size and cost of a DSL Digital Subscriber

MDT10P7401

Abstract: MDT10P7401L11 MDT10P7401P11 MDT10P7401Q11
Contextual Info: MDT10P7401 1. General Description A/D converter module: -8 analog inputs multiplexed into one A/D This EPROM-Based 8-bit micro-controller uses a fully static converter CMOS technology process to achieve higher speed and -10-bit resolution smaller size with the low power consumption and high

mth1210b

Contextual Info: AFE AFE1105 110 5 HDSL/MDSL ANALOG FRONT END FEATURES DESCRIPTION ● COMPLETE ANALOG INTERFACE ● T1, E1, AND MDSL OPERATION Burr-Brown’s Analog Front End greatly reduces the size and cost of an HDSL or MDSL system by providing all of the active analog circuitry needed to connect

AFE1124

Contextual Info: AFE AFE1124 112 E 4 FEATURES ● SERIAL DIGITAL INTERFACE ● 28-PIN SSOP ● E1, T1 AND MDSL OPERATION DESCRIPTION ET HDSL/MDSL ANALOG FRONT END ● 64kbps TO 1168kbps OPERATION ● SCALEABLE DATA RATE ● 250mW POWER DISSIPATION ● COMPLETE HDSL ANALOG INTERFACE

AFE1124

Abstract: AFE2124 AFE2124E SSOP-48 ALL DIGITAL ECHO IC
Contextual Info: AFE AFE2124 212 4 For most current data sheet and other product information, visit www.burr-brown.com Dual HDSL/SDSL ANALOG FRONT END FEATURES DESCRIPTION ● SERIAL DIGITAL INTERFACE ● 48-LEAD SSOP PACKAGE Burr-Brown’s dual Analog Front End chip greatly reduces the size and cost of a DSL Digital Subscriber

Contextual Info: AFE AFE1103 110 3 HDSL/MDSL ANALOG FRONT END FEATURES DESCRIPTION ● COMPLETE ANALOG INTERFACE Burr-Brown’s Analog Front End greatly reduces the size and cost of an HDSL or MDSL system by providing all of the active analog circuitry needed to connect

Contextual Info: AFE AFE1203 120 3 2Mbps, Single Pair HDSL ANALOG FRONT END FEATURES ● ● ● ● ● ● ● ● ● E1/T1 SINGLE PAIR 2B1Q OPERATION COMPLETE ANALOG INTERFACE 385mW POWER DISSIPATION PROGRAMMABLE POWER DESCRIPTION Burr-Brown’s Analog Front End greatly reduces the size and

R5F61634

Abstract: W60 065 R5F61638N50FPV TPU 2732 sck - 054 Nippon capacitors
Contextual Info: To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid