77V1053 Search Results

2975

Contextual Info: Integrated Device Technology, Inc. 2975 Stender Way, Santa Clara, CA - 95054 PRODUCT/PROCESS CHANGE NOTICE PCN PCN #: N0006-01 DATE: Product Affected: IDT 77V1054/77V1053 Manufacturing Location Affected: 6/30/00 MEANS OF DISTINGUISHING CHANGED DEVICES: Product Mark

JESD22-C101

Contextual Info: Integrated Device Technology, Inc. 2975 Stender Way, Santa Clara, CA - 95054 PRODUCT/PROCESS CHANGE NOTICE PCN 6/14/01 PCN #: DATE: MEANS OF DISTINGUISHING CHANGED DEVICES: I0105-02 Product Affected: IDT 77V1254/77V1253/ 77V1054/77V1053 Product Mark Back Mark

Contextual Info: 77V1053 Errata December 9, 1999 IDT 77V1053 Errata Rev A Item Number 1 Short Description The receive Utopia bus does not tri-state when deselected. 2 A TXLED pin may assert inappropriately. 3 TXLED[0] pin asserts for transmit activity on any port. 4 Deassertion of TXEN between the 5th and 6th bytes of a cell will result in cell corruption.

Contextual Info: 77V1053L25 Device Errata Notes Supplemental Information The revision of the 77V1053L25 can be determined visually from the date code shown on the top marking. The date code is the third line of text. ∫ dt 77V1053 77V1254 L25PG DZyywwA Date Code “yyww_” indicates Year, Week & Assembly location

Contextual Info: 77V1053 ERRATA, REV. 4 June 6, 2000 Item Number 1 Applies to Rev. A 2 A, B, CZ 3 A 4 A, B, CZ 5 A, B Short Description The receive Utopia bus does not tri-state when deselected. A TXLED pin may assert inappropriately. In Revisions B and later, this erratum has been corrected on port 0 but still exists on ports 1-2.

SF1153

Abstract: PE-67583 atm header error checking 77V105
Contextual Info: PRELIMINARY 77V1053 Triple Port ATM PHY for 25.6 and 51.2 Mbps with 8-bit Utopia 2 Description Features * Performs the PHY-Transmission Convergence TC and Physical Media Dependent (PMD) Sublayer functions for three 25.6 Mbps ATM channels * Compliant to ATM Forum (af-phy-040.000) and ITU-T I.432.5

74ALVCH244

Abstract: D2396 BOOT13
Contextual Info:
          March 2001 2975 Stender Way, Santa Clara, California 95054 Telephone: 800 345-7015 • TWX: 910-338-2070 • FAX: (408) 492-8674 Printed in U.S.A. 2001 Integrated Device Technology, Inc. DISCLAIMER Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance

Contextual Info: 77V1054L25 Device Errata Notes Supplemental Information The revision of the 77V1054L25 can be determined visually from the date code shown on the top marking. The date code is the third line of text. ∫ dt 77V1054 77V1254 L25PG DZyywwA Date Code “yyww_” indicates Year, Week & Assembly location

Contextual Info: 77V1053 ERRATA, REV. 5 November 29, 2000 Item Number 1 2 3 4 Applies to Rev. DZ Short Description The receive Utopia bus does not tri-state when deselected. DZ, BZ, CZ A TXLED pin may assert inappropriately. See note 1. DZ TXLED[0] pin asserts for transmit activity on any port.

DB29 connector male

Abstract: 74ALVCH244 conn 2X5 BD S34 crt monitor DB9 male connector to DB15 male CONNECTOR DB26 77V105 D2396 8MBX32
Contextual Info: 79EB355 Evaluation Board Manual June 2003 6024 Silver Creek Valley Road, San Jose, California 95138 Telephone: 800 345-7015 • (408) 284-8200 • FAX: (408) 284-2775 Printed in U.S.A. 2005 Integrated Device Technology, Inc. DISCLAIMER Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance

philips diode PH 33J

Abstract: UM61256FK-15 sem 2106 inverter diagram IDT7024L70GB um61256 UM61256ak sram um61256fk15 HIGH VOLTAGE ISOLATION DZ 2101 C5584 IDT74LVC1G07ADY
Contextual Info: QUICKSWITCH PRODUCTS HIGH-SPEED LOW POWER CMOS 10-BIT BUS SWITCHES QS3L384 QS3L2384 FEATURES/BENEFITS DESCRIPTION • • • • • • • • • The QS3L384 and QS3L2384 provide a set of ten high-speed CMOS TTL-compatible bus switches. The low ON resistance of the QS3L384 allows inputs to be connected to outputs without

PE-67583

Abstract: SF1153 TLA-6M103
Contextual Info: PRELIMINARY 77V1053 Triple Port ATM PHY for 25.6 and 51.2 Mbps with 8-bit Utopia 2 Features Description ◆ The 77V1053 is a member of IDT's family of products supporting Asynchronous Transfer Mode ATM data communications and networking. The 77V1053 implements the physical layer for 25.6

74ALVCH244

Abstract: j2233 RC3235 MSC501 71V416S15
Contextual Info: 79EB351 Evaluation Board Manual June 2003 6024 Silver Creek Valley Road, San Jose, California 95138 Telephone: 800 345-7015 • (408) 284-8200 • FAX: (408) 284-2775 Printed in U.S.A. 2005 Integrated Device Technology, Inc. DISCLAIMER Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance

74ALVCH244

Abstract: DB16 connector
Contextual Info: IDT79EB351 Evaluation Board Manual January 2002 2975 Stender Way, Santa Clara, California 95054 Telephone: 800 345-7015 • TWX: 910-338-2070 • FAX: (408) 330-1748 Printed in U.S.A. 2001 Integrated Device Technology, Inc. DISCLAIMER Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance