7725 Search Results

Contextual Info: Integrated Device Technology, Inc. 2975 Stender Way, Santa Clara, CA - 95054 PRODUCT CHANGE NOTICE PCN PCN #: N9901-01 DATE: 4/15/99 Product Affected: 77252Y NPD Family Manufacturing Location Affected: FAB II Date Effective: 7/15/1999 Contact: Title: Phone #:

identification trace code texas

Abstract: SPRU210 TMS320VC5402 SPRZ155 TMS320VC5402 bootloading TMS320C5000 TMS320UC5402 TMS320VC5402PGE tms320 54x mcbsp SPRU173
Contextual Info: SPRZ155A NOVEMBER 1999 – REVISED JANUARY 2000 TMS320VC5402/TMS320UC5402 DSP SILICON UPDATES for the TMS320VC5402/TMS320UC5402 DSP Copyright  2000, Texas Instruments Incorporated POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 1 SPRZ155A NOVEMBER 1999 – REVISED JANUARY 2000

Contextual Info: 8 Way-0° Power Splitter/Combiner ZB8PD-8.4 Typical Performance Data dB (MHz) 7200.0 7275.0 7350.0 7425.0 7500.0 7575.0 7650.0 7725.0 7800.0 7875.0 7950.0 8025.0 8100.0 8175.0 8400.0 1 AMP. UNBAL. (dB) TOTAL LOSS1 FREQ. S-1 S-2 S-3 S-4 S-6 S-8 9.99 10.09

Contextual Info: 4 Way-0° Power Splitter/Combiner ZB4PD1-8.4+ Typical Performance Data FREQ. dB (MHz) 6675.0 6750.0 6825.0 6975.0 7125.0 7275.0 7425.0 7575.0 7725.0 7875.0 8025.0 8175.0 8250.0 8325.0 8400.0 AMP. UNBAL. (dB) INSERTION LOSS S-1 S-2 S-3 S-4 6.67 6.70 6.75

Contextual Info: TCM1520A RING DETECTOR ą ą SCTS005B − OCTOBER 1984 − REVISED DECEMBER 1990 • • • • • • • On-Chip 150-V Bridge Diode Configuration Reliable BIDFET† Technology High Standby Impedance . . . 1 MΩ Typ Efficient High-Voltage Operation Output Compatible With TTL, NMOS, and

Contextual Info: TMS29F010 131ā072 BY 8ĆBIT FLASH MEMORY SMJS840A − NOVEMBER 1997 − REVISED JUNE 1998 FM PACKAGE TOP VIEW D Single Power Supply D D D D D D A12 A15 A16 NC VCC W NC 4 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 3 2 1 32 31 30 5 29 6 28 7 27 8 26 9 25 10 24 11 23 12

Contextual Info: Not Recommended for New Designs SM34020A GRAPHICS SYSTEM PROCESSOR SGUS057 − FEBRUARY 2005 D Class B High-Reliability Processing D 1-µm CMOS Technology D Military Operating Temperature Range D D D D D D D D −40°C to 110°C SM34020A-32/ 40 125 / 100-ns Instruction Cycle Time

THS8134

Abstract: THS8134B
Contextual Info: THS8134, THS8134A, THS8134B TRIPLE 8ĆBIT, 80 MSPS VIDEO D/A CONVERTER WITH TRIĆLEVEL SYNC GENERATION SLVS205D − MAY 1999 − REVISED MARCH 2000 features TQFP-48 PowerPAD PACKAGE TOP VIEW M2 M1 AVSS ABPb AVDD ARPr AVSS AGY AVDD COMP FSADJ VREF D Triple 8-Bit D/A Converters

Contextual Info: TPIC2202 2ĆCHANNEL COMMONĆSOURCE POWER DMOS ARRAY ą ą SLIS017 − SEPTEMBER 1992 • • • • • Two 7.5-A Independent Output Channels, Continuous Current Per Channel Low rDS on . . . 0.09 Ω Typical Output Voltage . . . 60 V Pulsed Current . . . 15 A Per Channel

Contextual Info: SN54LV174, SN74LV174 HEX DĆTYPE FLIPĆFLOPS WITH CLEAR SCLS192B − FEBRUARY 1993 − REVISED APRIL 1996 D EPIC  Enhanced-Performance Implanted D D D D CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54ABT543, SN74ABT543 OCTAL REGISTERED TRANSCEIVERS WITH 3ĆSTATE OUTPUTS SCBS157A − JANUARY 1991 − REVISED JULY 1994 • • • • • State-of-the-Art EPIC-ΙΙB  BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per

SN55LBC976

Contextual Info: SN75LBC976 9ĆCHANNEL DIFFERENTIAL TRANSCEIVER ą ą SLLS133D − AUGUST 1992 − REVISED MAY 1995 • • • • • • • • • Nine Differential Channels for the Data and Control Paths of the Differential Small Computer Systems Interface SCSI and

Contextual Info: SN64BCT240 OCTAL BUFFER/DRIVER WITH 3ĆSTATE OUTPUTS SCBS049A − MAY 1990 − REVISED NOVEMBER 1993 • • • • • DW OR N PACKAGE TOP VIEW State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers

Contextual Info: TCM1030, TCM1060 DUAL TRANSIENTĆVOLTAGE SUPPRESSORS SCTS040A − JUNE 1989 − REVISED MAY 1996 D Meet or Exceed Bell Standard LSSGR D D D D D OR P PACKAGE Requirements Externally-Controlled Negative Firing Voltage . . . −70 V Max Accurately Controlled, Wide Negative

SN10KHT5573

Contextual Info: SN10KHT5573 OCTAL ECLĆTOĆTTL TRANSLATOR WITH DĆTYPE TRANSPARENT LATCHES AND 3ĆSTATE OUTPUTS SDZS015 − MAY 1990 − REVISED OCTOBER 1990 • • • • • • DW OR NT PACKAGE T0P VIEW 10KH Compatible ECL and TTL Control Inputs 1Q 2Q 3Q 4Q VCC GND

Contextual Info: TMS370Cx2x 8-BIT MICROCONTROLLER SPNS018C – FEBRUARY 1993 – REVISED FEBRUARY 1997 D D D D D D D D FN AND FZ PACKAGES TOP VIEW RESET C0 B4 B3 B2 B1 B0 SCITXD SCIRXD SCICLK D5 CMOS/ EEPROM/ EPROM Technologies on a Single Device – Mask-ROM Devices for High-Volume

Contextual Info: Coaxial ZB4PD1-8.4+ ZB4PD1-8.4 Power Splitter/Combiner 4 Way-0° 50Ω 6700 to 8400 MHz Maximum Ratings Features Operating Temperature -55°C to 100°C Storage Temperature -55°C to 100°C Power Input as a splitter 10W max. Internal Dissipation SMA version shown

Contextual Info: TM2EP640PN, TM2EP64DJN, TM4EP64DPN, TM4EP64DJN TM2EP72DPN, TM2EP720JN, TM4EP72DPN, TM4EP72DJN EXTENDED-DATA-OUT DYNAMIC RAM MODULES Organization - TM2EP64DxN . . . 2097152 x 64 Bits - TM2EP72DxN . . . 2097152 x 72 Bits - TM4EP64DxN . . . 4194304 x 64 Bits

ALi m 3329

Contextual Info: 1 ABR SAR Overview The 77252 ABR SAR PCI ATM Controller is a member of IDT's family of products for Asynchronous Transfer Mode ATM networks. The ABR SAR performs both the ATM Adaptation Layer (AAL) Segmentation and Reassembly (SAR) function and the ATM layer

Contextual Info: TMS320C6211, TMS320C6211B FIXEDĆPOINT DIGITAL SIGNAL PROCESSORS SPRS073L − AUGUST 1998 − REVISED JUNE 2005 D Excellent Price/Performance Digital Signal D D D Processors DSPs : TMS320C62x (TMS320C6211 and TMS320C6211B) − Eight 32-Bit Instructions/Cycle

Contextual Info: TLE2425 PRECISION VIRTUAL GROUND ą ąą SLOS065D − MARCH 1991 − REVISED APRIL 2002 D 2.5-V Virtual Ground for 5-V/GND Analog D D D Excellent Regulation Characteristics Systems High Output-Current Capability Sink or Source . . . 20 mA Typ Micropower Operation . . . 170 µA Typ

Contextual Info: BurrĆBrown Products from Texas Instruments ISO 15 ISO150 SBOS032B – SEPTEMBER 2000 – REVISED FEBRUARY 2005 DUAL, ISOLATED, BIDIRECTIONAL DIGITAL COUPLER FEATURES • • • • • • • • DESCRIPTION Replaces High-Performance Optocouplers Data Rate: 80 M Baud, Typ

Contextual Info: SMJ320LC549 FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR SGUS032B – OCTOBER 2002 – REVISED MAY 2003 D Processed to MIL-PRF-38535 QML D Advanced Multibus Architecture With Three D D D D D D D D D D D D D D Separate 16-Bit Data Memory Buses and One Program Memory Bus

Contextual Info: SM320VC5409-EP FIXED-POINT DIGITAL SIGNAL PROCESSOR SGUS046 − JULY 2003 D Controlled Baseline D D D D D D D D D D D D D D D − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −40°C to 100°C Enhanced Diminishing Manufacturing