751BU Search Results
751BU Datasheets Context Search
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Contextual Info: PCS1P2192A Product Preview VDP Multiple Pixel Clock Generator Product Description http://onsemi.com The PCS1P2192A is a clock generator that generates multiple selectable pixel clock outputs for Video Display Panel applications from an external 20 MHz reference clock. The PLL based clock |
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Contextual Info: NCP51199 DDR 2-Amp Source / Sink VTT Termination Regulator The NCP51199 is a linear regulator designed to supply a regulated V TT termination voltage for DDR−2 and DDR−3 memory applications. The regulator is capable of actively sourcing and sinking ±2 A peak currents for DDR−2, and DDR−3 up to ±1.5 A while |
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8 pin SOIC-8 1251Contextual Info: NCP51198 Product Preview 1.5A DDR Memory Termination Regulator The NCP51198 is a simple, cost−effective, high−speed linear regulator designed to generate the VTT termination voltage rail for DDR−I, DDR−II and DDR−III memory. The regulator is capable of |
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Contextual Info: NCP51199 Product Preview DDR 2-Amp Source / Sink VTT Termination Regulator The NCP51199 is a linear regulator designed to supply a regulated V TT termination voltage for DDR−2 and DDR−3 memory applications. The regulator is capable of actively sourcing and sinking |
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Contextual Info: NCP51198 1.5A DDR Memory Termination Regulator The NCP51198 is a simple, cost−effective, high−speed linear regulator designed to generate the VTT termination voltage rail for DDR−I, DDR−II and DDR−III memory. The regulator is capable of actively sourcing or sinking up to ±1.5 A for DDR−I, or up to ±0.5 A |
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Contextual Info: PCS3P25811, PCS3P25812, PCS3P25814 Product Preview Spread Spectrum Clock Generator http://onsemi.com Product Description The PCS3P25811/12/14 devices are versatile spread spectrum frequency modulators designed specifically for a wide range of input clock frequencies from 4 MHz to 32 MHz. |
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Contextual Info: P3P623S00B, P3P623S00E Product Preview Timing-Safet Peak EMI Reduction IC http://onsemi.com Functional Description P3P623S00B/E is a versatile, 3.3 V Zero−delay buffer designed to distribute Timing−Safe clocks with Peak EMI reduction. P3P623S00B is an eight−pin version, accepts one reference input and drives out one |
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Contextual Info: NCP51199, NCV51199 DDR 2-Amp Source / Sink VTT Termination Regulator The NCP/NCV51199 is a linear regulator designed to supply a regulated VTT termination voltage for DDR−2 and DDR−3 memory applications. The regulator is capable of actively sourcing and sinking |
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Contextual Info: NCP51198, NCV51198 1.5A DDR Memory Termination Regulator The NCP/NCV51198 is a simple, cost−effective, high−speed linear regulator designed to generate the VTT termination voltage rail for DDR−I, DDR−II and DDR−III memory. The regulator is capable of |
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Contextual Info: NCP51199 DDR 2-Amp Source / Sink VTT Termination Regulator The NCP51199 is a linear regulator designed to supply a regulated V TT termination voltage for DDR−2 and DDR−3 memory applications. The regulator is capable of actively sourcing and sinking ±2 A peak currents for DDR−2, and DDR−3 up to ±1.5 A while |
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ncp51199ncp51199/d |