751B03 Search Results

C6093

Abstract: 74HC138A HC138A ADI1455 HC138 LS138 MC54HCXXXAJ MC74HCXXXAD MC74HCXXXAN
Contextual Info: Order this data sheet by M C54/74HC138A/D MOTOROLA S E M IC O N D U C TO R TECHNICAL DATA MC54/74HC138A Advanced Information J SUFFIX CERAMIC CASE 620-09 1 -o f- 8 D e c o d e r /D e m u ltip le x e r H ig h -P erfo rm a n ce S ilic o n -G a te C M O S N SUFFIX

F381

Contextual Info: The MC54/74F182 is a high-speed carry lookahead generator. It is generally used with the F181, F381 or 29F01 4-bit arithmetic logic unit to provide high-speed lookahead over word lengths of more than four bits. • Provides Lookahead Carries Across a Group of Four ALUs

TS 4142

Abstract: F169
Contextual Info: MC54/74F168 MC54/74F169 4-STAGE SYNCHRONOUS BIDIRECTIONAL COUNTERS The MC54/74F168 and MC54/74F169 are fully synchronous 4-stage up/ down counters. The F168 is a BCD decade counter; the F169 is a modulo-16 binary counter. Both feature a preset capability for programmable operation,

motorola F74

Abstract: 74F109
Contextual Info: The MC54/74F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop refer to F74 data sheet by connecting the J and K inputs together.

74LS390

Abstract: 74LS393 equivalent 74LS393 LS290 LS293 LS390 LS393
Contextual Info: SN54/74LS390 SN54/74LS393 DUAL DECADE COUNTER; DUAL 4-STAGE BINARY COUNTER The SN54 / 74LS390 and SN54 / 74LS393 each contain a pair of high-speed 4-stage ripple counters. Each half of the LS390 is partitioned into a divide-by-two section and a divide-by five section, with a separate clock input

MC74F161A

Abstract: MC74F163A MC74FXXXAJ MC74FXXXAN
Contextual Info: LIFETIME BUY The MC74F161A and MC74F163A are high-speed synchronous modulo-16 binary counters. They are synchronously presettable for application in programmable dividers and have two types of Count Enable inputs plus a Terminal Count output for versatility in forming synchronous multistage counters.

16 line to 4 line priority encoder

Abstract: MC54/74F14 F148 4 line to 2 line priority encoder ttl priority encoder 74F148
Contextual Info: MC54/74F148 8-LINE TO 3-LINE PRIORITY ENCODER The MC54/74F148 provides three bits of binary coded output representing the position of the highest order active input, along with an output indicating the presence of any active input. It is easily expanded via input and output enables to provide priority encoding over many bits.

74ls166

Abstract: 74ls gate symbols 74LS TTL 74ls166 datasheet 74LS LS166 SN54LSXXXJ SN74LSXXXD SN74LSXXXN
Contextual Info: SN54/74LS166 8-BIT SHIFT REGISTERS The SN54L/ 74LS166 is an 8-Bit Shift Register. Designed with all inputs buffered, the drive requirements are lowered to one 54/ 74LS standard load. By utilizing input clamping diodes, switching transients are minimized and

74LS42

Abstract: PIN 74LS42 data sheet 74ls42 LS42 sn5474ls42
Contextual Info: SN54/74LS42 ONE-OF-TEN DECODER The LSTTL / MSI SN54 / 74LS42 is a Multipurpose Decoder designed to accept four BCD inputs and provide ten mutually exclusive outputs. The LS42 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all Motorola TTL families.

74LS147

Abstract: 74ls147 pin diagram FUNCTIONAL APPLICATION OF 74LS148 74ls148 74LS147 equivalent motorola 74ls147 74ls748 SN54/74LS147 FAST AND LS TTL ls74
Contextual Info: SN54/74LS147 SN54/74LS148 SN54/74LS748 10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS The SN54 / 74LS147 and the SN54/ 74LS148 are Priority Encoders. They provide priority decoding of the inputs to ensure that only the highest order data line is encoded. Both devices have data inputs and outputs which are

TOP 242 PN

Abstract: TTL 74145 LS 74145 74LS145 SN74LSXXXD SN74LSXXXN SN54LSXXXJ 751B-03
Contextual Info: SN54/74LS145 1-OF-10 DECODER/DRIVER OPEN-COLLECTOR The SN54 / 74LS145, 1-of-10 Decoder/Driver, is designed to accept BCD inputs and provide appropriate outputs to drive 10-digit incandescent displays. All outputs remain off for all invalid binary input conditions. It is

motorola zc 5276

Abstract: 74LS158 circuit diagram of 32-1 multiplexer LS158 SN54LSXXXJ SN74LSXXXD SN74LSXXXN
Contextual Info: SN54/74LS158 QUAD 2-INPUT MULTIPLEXER The LSTTL/ MSI SN54L/ 74LS158 is a high speed Quad 2-input Multiplexer. It selects four bits of data from two sources using the common Select and Enable inputs. The four buffered outputs present the selected data in the

74LS112A

Abstract: 74LS112 SN54/74LS112A truth table NOT gate 74 SN54LSXXXJ SN74LSXXXD SN74LSXXXN JD16
Contextual Info: SN54/74LS112A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS112A dual JK flip-flop features individual J, K, clock, and asynchronous set and clear inputs to each flip-flop. When the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the

motorola 74LS670

Abstract: Dip 28 motorola 74LS170 74LS670 SN54LSXXXJ SN74LSXXXD SN74LSXXXN
Contextual Info: SN54/74LS670 4 x 4 REGISTER FILE WITH 3-STATE OUTPUTS The TTL / MSI SN54 / 74LS670 is a high-speed, low-power 4 x 4 Register File organized as four words by four bits. Separate read and write inputs, both address and enable, allow simultaneous read and write operation.

circuit diagram of 32-1 multiplexer

Abstract: 4 input multiplexer low power TTL 74ls153 truth table NOT gate 74 SN74LSXXXD SN74LSXXXN 74LS153 74LS352 SN54LSXXXJ 74LS153 multiplexer truth table
Contextual Info: SN54/74LS352 DUAL 4-INPUT MULTIPLEXER The SN54 / 74LS352 is a very high-speed Dual 4-input Multiplexer with Common Select inputs and individual Enable inputs for each section. It can select two bits of data from four sources. The two buffered outputs present

FAST AND LS TTL

Abstract: 751A-02 b8pl
Contextual Info: SN54/74LS15 TRIPLE 3-INPUT AND GATE TRIPLE 3-INPUT AND GATE VCC 14 LOW POWER SCHOTTKY 13 12 11 10 9 * 8 * * 1 2 3 4 5 6 J SUFFIX CERAMIC CASE 632-08 7 14 GND * OPEN 1 COLLECTOR OUTPUTS N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION

Contextual Info: g MC74AC161 MC74ACT161 M C74AC163 M C74ACT163 MOTOROLA Synchronous P resettab le Binary C ou n ter SYNCHRONOUS PRESETTABLE BINARY COUNTER The MC74AC161/74ACT161 and MC74AC163/74ACT163 are high-speed synchron­ ous modulo-16 binary counters. They are synchronously presettable for application

3-bit binary adder circuit

Abstract: 16C4 F283 circuit diagram of full adder circuit diagram of full adder circuit using nor 8 bit full adder 74
Contextual Info: LIFETIME BUY The MC54/74F283 high-speed 4-bit binary full adder with internal carry lookahead, accepts two 4-bit binary words A0–A3, B0–B3 and a Carry input (C0). It generates the binary Sum outputs (S0–S3) and the Carry output (C4) from the most significant bit. The F283 will operate with either active-HIGH or

MOTOROLA f257

Abstract: motorola zc F257 MC74F257A MC74FXXXAN MC74f257
Contextual Info: LIFETIME BUY The MC74F257 is a quad 2-input multiplexer with 3-state outputs. Four bits of data from two sources can be selected using a common Data Select input. The four outputs present the selected data in true non-inverted form. The outputs may be switched to a high impedance state with a HIGH on the common Output Enable (OE) input, allowing the outputs to interface directly with

74f259 motorola

Abstract: 74f259
Contextual Info: LIFETIME BUY The MC54/74F259 is a high-speed 8-bit addressable latch designed for general purpose storage applications in digital systems. It is a multifunctional device capable of storing single line data in eight addressable latches, and also a 1-of-8 decoder and demultiplexer with active HIGH outputs. The device

F151

Contextual Info: MC54/74F151 8-INPUT MULTIPLEXER The MC54/74F151 is a high-speed 8-input digital multiplexer. It provides in one package, the ability to select one line of data from up to eight sources. The F151 can be used as a universal function generator to generate any logic

74LS348

Abstract: G104 74LS848 LS348 SN54LSXXXJ SN74LSXXXN
Contextual Info: SN54/74LS348 SN54/74LS848 8-INPUT PRIORITY ENCODERS WITH 3-STATE OUTPUTS The SN54 / 74LS348 and the SN54 / 74LS848 are eight input priority encoders which provide the 8-line to 3-line function. The outputs A0 – A2 and inputs (0 – 7) are active low. The active low input

MC74F195

Contextual Info: LIFETIME BUY The functional characteristics of the MC74F195 4-Bit Parallel Access Shift Register are indicated in the Logic Diagram and Function Table. The device is useful in a wide variety of shifting, counting, and storage applications. It performs serial, parallel, serial-to-parallel, or parallel-to-serial data transfers at

ls378

Abstract: 74LS377 74LS174 74LS175 74LS378 74LS379
Contextual Info: SN54/74LS377 SN54/74LS378 SN54/74LS379 OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE The SN54 / 74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a