74LVC2G Search Results

nz104

Contextual Info: 74LVC2G66 Bilateral switch Rev. 7 — 22 June 2012 Product data sheet 1. General description The 74LVC2G66 is a low-power, low-voltage, high-speed Si-gate CMOS device. The 74LVC2G66 provides two single pole, single-throw analog switch functions. Each switch has two input/output terminals nY and nZ and an active HIGH enable input (nE).

Marking code V7

Contextual Info: 74LVC2G00 Dual 2-input NAND gate Rev. 11 — 22 June 2012 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.

74LVC2G66

Abstract: 74LVC2G66DC 74LVC2G66DP 74LVC2G66GT 74LVCV2G66 JESD22-A114E JESD78
Contextual Info: 74LVC2G66 Bilateral switch Rev. 04 — 1 July 2008 Product data sheet 1. General description The 74LVC2G66 is a low-power, low-voltage, high-speed Si-gate CMOS device. The 74LVC2G66 provides two single pole, single-throw analog switch functions. Each switch has two input/output terminals nY and nZ and an active HIGH enable input (nE).

74LVC2G126

Abstract: 74LVC2G126DC 74LVC2G126DP 74LVC2G126GD 74LVC2G126GM 74LVC2G126GT JESD22-A114E MO-187
Contextual Info: 74LVC2G126 Dual bus buffer/line driver; 3-state Rev. 08 — 5 May 2008 Product data sheet 1. General description The 74LVC2G126 is a dual non-inverting buffer/line driver with 3-state outputs. Each 3-state output is controlled by an output enable input pin nOE . A LOW-level at pin nOE

74LVC2G241

Abstract: 74LVC2G241DC 74LVC2G241DP 74LVC2G241GD 74LVC2G241GM 74LVC2G241GT JESD22-A114E
Contextual Info: 74LVC2G241 Dual buffer/line driver; 3-state Rev. 09 — 10 June 2008 Product data sheet 1. General description The 74LVC2G241 is a dual non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE:

74LVC2G125

Abstract: 74LVC2G125DP V125
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC2G125 Dual bus buffer/line driver; 3-state Product specification 2003 Mar 10 Philips Semiconductors Product specification Dual bus buffer/line driver; 3-state 74LVC2G125 FEATURES DESCRIPTION • Wide supply voltage range from 1.65 to 5.5 V

74LVC2G86

Abstract: 74LVC2G86DC 74LVC2G86DP 74LVC2G86GM 74LVC2G86GT
Contextual Info: 74LVC2G86 Dual 2-input EXCLUSIVE-OR gate Rev. 8 — 19 October 2010 Product data sheet 1. General description The 74LVC2G86 provides a dual 2-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these

74LVC2GU04

Abstract: 74LVC2GU04GM 74LVC2GU04GV 74LVC2GU04GW
Contextual Info: 74LVC2GU04 Dual inverter Rev. 6 — 27 October 2010 Product data sheet 1. General description The 74LVC2GU04 provides two inverters. Each inverter is a single stage with unbuffered output. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of

74LVC2G32

Abstract: 74LVC2G32DC 74LVC2G32DP 74LVC2G32GM 74LVC2G32GT XSON8 SOT1116
Contextual Info: 74LVC2G32 Dual 2-input OR gate Rev. 8 — 10 November 2010 Product data sheet 1. General description The 74LVC2G32 provides a 2-input OR gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.

74LVC2G126

Abstract: 74LVC2G126DC 74LVC2G126DP 74LVC2G126GD 74LVC2G126GM 74LVC2G126GT
Contextual Info: 74LVC2G126 Dual bus buffer/line driver; 3-state Rev. 9 — 13 September 2010 Product data sheet 1. General description The 74LVC2G126 is a dual non-inverting buffer/line driver with 3-state outputs. Each 3-state output is controlled by an output enable input pin nOE . A LOW-level at pin nOE

74LVC2G32

Abstract: 74LVC2G32DC 74LVC2G32DP 74LVC2G32GM 74LVC2G32GT MO-187 VSSOP8
Contextual Info: 74LVC2G32 Dual 2-input OR gate Rev. 06 — 27 February 2008 Product data sheet 1. General description The 74LVC2G32 provides a 2-input OR gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.

Contextual Info: NXP 74LVC2G66 demo board Demonstrate fast switching of HF signals with a dual SPST analog switch This compact demo board makes it easy to evaluate the 74LVC2G66, a dual SPST analog switch that supports high-frequency bandwidth and has control inputs tolerant to over-supply voltage.

74LVC2GU04GW

Abstract: dual inverter high power DC inverter sot363 74LVC2GU04 74LVC2GU04GV MNA053 U043
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC2GU04 Dual inverter Product specification Supersedes data of 2003 Aug 29 2004 May 24 Philips Semiconductors Product specification Dual inverter 74LVC2GU04 FEATURES DESCRIPTION • Wide supply voltage range from 1.65 V to 5.5 V

74LVC2G00

Abstract: 74LVC2G00DC 74LVC2G00DP 74LVC2G00GD 74LVC2G00GM 74LVC2G00GT
Contextual Info: 74LVC2G00 Dual 2-input NAND gate Rev. 08 — 26 October 2009 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.

Contextual Info: 74LVC2G34-Q100 Dual buffer gate Rev. 1 — 1 August 2012 Product data sheet 1. General description The 74LVC2G34-Q100 provides two buffers. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.

Contextual Info: 74LVC2G07 Buffers with open-drain outputs Rev. 6 — 30 November 2011 Product data sheet 1. General description The 74LVC2G07 provides two non-inverting buffers. The output of this device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.

74LVC2G53

Abstract: 74LVC2G53DC 74LVC2G53DP 74LVC2G53GT JESD22-A114E
Contextual Info: 74LVC2G53 2-channel analog multiplexer/demultiplexer Rev. 03 — 28 August 2007 Product data sheet 1. General description The 74LVC2G53 is a low-power, low-voltage, high-speed, Si-gate CMOS device. The 74LVC2G53 provides one analog multiplexer/demultiplexer with a digital select

74LVC2G17

Abstract: 74LVC2G17GM 74LVC2G17GV 74LVC2G17GW
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC2G17 Dual non-inverting Schmitt-trigger with 5 V tolerant input Product specification Suppersedes data of 2003 Aug 13 2004 Sep 08 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input

11851

Abstract: 74LVC2G86 74LVC2G86DP
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC2G86 Dual 2-input exclusive-OR gate Product specification 2003 Aug 25 Philips Semiconductors Product specification Dual 2-input exclusive-OR gate 74LVC2G86 FEATURES DESCRIPTION • Wide supply voltage range from 1.65 to 5.5 V

Contextual Info: 74LVC2G00 Dual 2-input NAND gate Rev. 12 — 8 April 2013 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.

Contextual Info: 74LVC2G02 Dual 2-input NOR gate Rev. 11 — 8 April 2013 Product data sheet 1. General description The 74LVC2G02 provides a 2-input NOR gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.

Contextual Info: 74LVC2G66 Bilateral switch Rev. 8 — 2 April 2013 Product data sheet 1. General description The 74LVC2G66 is a low-power, low-voltage, high-speed Si-gate CMOS device. The 74LVC2G66 provides two single pole, single-throw analog switch functions. Each switch has two input/output terminals nY and nZ and an active HIGH enable input (nE).

Contextual Info: 74LVC2G240 Dual inverting buffer/line driver; 3-state Rev. 8 — 8 April 2013 Product data sheet 1. General description The 74LVC2G240 is a dual inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH level at

DFN1010

Abstract: 74LVC2G34 A115-A C101 74LVC2G34W6-7
Contextual Info: 74LVC2G34 DUAL BUFFER Description Pin Assignments The 74LVC2G34 is a dual buffer gate with standard push - Top View pull outputs. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant 1A 1 6 1Y GND 2 5 VCC