74LVC1G38GW Search Results

Contextual Info: 74LVC1G38 2-input NAND gate; open drain Rev. 7 — 4 October 2012 Product data sheet 1. General description The 74LVC1G38 provides a 2-input NAND function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device as translator in a mixed 3.3 V and 5 V environment.

Contextual Info: 74LVC1G38-Q100 2-input NAND gate; open drain Rev. 1 — 27 November 2013 Product data sheet 1. General description The 74LVC1G38-Q100 provides a 2-input NAND function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this

Contextual Info: 74LVC1G38 2-input NAND gate; open drain Rev. 5 — 6 December 2011 Product data sheet 1. General description The 74LVC1G38 provides a 2-input NAND function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device as translator in a mixed 3.3 V and 5 V environment.

TRANSISTOR MARKING YB

Abstract: 74LVC1G38 74LVC1G38GF 74LVC1G38GM 74LVC1G38GV 74LVC1G38GW
Contextual Info: 74LVC1G38 2-input NAND gate; open drain Rev. 4 — 5 October 2010 Product data sheet 1. General description The 74LVC1G38 provides a 2-input NAND function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device as translator in a mixed 3.3 V and 5 V environment.

Contextual Info: 74LVC1G38 2-input NAND gate; open drain Rev. 6 — 2 July 2012 Product data sheet 1. General description The 74LVC1G38 provides a 2-input NAND function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device as translator in a mixed 3.3 V and 5 V environment.

74LVC1G38

Abstract: 74LVC1G38GF 74LVC1G38GM 74LVC1G38GV 74LVC1G38GW JESD22-A114E MO-203
Contextual Info: 74LVC1G38 2-input NAND gate; open drain Rev. 03 — 27 August 2007 Product data sheet 1. General description The 74LVC1G38 provides a 2-input NAND function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device as translator in a mixed 3.3 V and 5 V environment.

Contextual Info: 74LVC1G38 2-input NAND gate; open drain Rev. 6 — 2 July 2012 Product data sheet 1. General description The 74LVC1G38 provides a 2-input NAND function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device as translator in a mixed 3.3 V and 5 V environment.

marking code YB

Abstract: 74LVC1G38GW
Contextual Info: 74LVC1G38 2-input NAND gate open drain Rev. 02 — 13 September 2006 Product data sheet 1. General description The 74LVC1G38 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this

PCA9698DGG

Abstract: PCA9698 OM6275 PCA9530 IO42 74LVC1G38 UM10267
Contextual Info: UM10267 PCA9698 demonstration board OM6281 Rev. 01 — 24 September 2008 User manual Document information Info Content Keywords I2C, PCA9698, GPIO Abstract The OM6281 is an add-on to NXP’s I2C 2005-1 demo board. This daughter board makes it easy to test and design with the PCA9698, a

74LVC1G38

Abstract: 74LVC1G38GM 74LVC1G38GV 74LVC1G38GW
Contextual Info: 74LVC1G38 2-input NAND gate open drain Rev. 01 — 18 October 2004 Product data sheet 1. General description The 74LVC1G38 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this