74LS793 Search Results

SN74LS794

Abstract: SN54LS793 SN54LS794 SN74LS793 SN74LS794J
Contextual Info: 8-B it Latch/Register with Readback SN54/74LS793 SN54/74LS794 Ordering Inform ation Features/ Benefits • I/O port configuration enables output data back onto input bus PART NUMBER PKG TEMP POLARITY TYPE POWER • 8-bit data path matches byte boundaries • Ideal for microprocessor interlace

Contextual Info: 8-B it Latch/Register with Readback SN54/74LS793 SN54/74LS794 F e a tu re s /B e n e fits O rdering inform ation • I/O port configuration enables output data back onto input bus PART NUMBER PKG SN54LS793 74LS793 J,W,L N,J Mil Com SN54LS794 SN74LS794 J,W,L

74LS794

Abstract: SN54LS793 SN54LS794 SN74LS793 SN74LS794 74LS793
Contextual Info: 8-B it Latch/Register with Readback SN54/74LS793 SN54/74LS794 Ordering Information Features/ Benefits • I/O port configuration enables output data back onto input bus PART NUMBER PKG TEMP POLARITY TYPE POWER • 8-bit data path matches byte boundaries • Ideal for microprocessor interlace

74LS547

Abstract: 74ls652 74LS654 74LS245 latch 74LS648 74LS651 54LS547 74ls546 74LS567 74LS647
Contextual Info: Tabi« of Contento DOUBLE-DENSITY PLUS INTERFACE Contents for Section 12 . Double-Density PLU S Selection Guide . Small But Mighty; New Components Give You More Logic in Less Chips .