74LS192 IC Search Results

74LS192 truth table

Abstract: 74LS193 truth table 74LS192 PIN diagram 74ls193 74LS192 74LS192 INTERNAL DIAGRAM TTL 74ls193 74LS193 pin data 74LS192 table ttl 74ls192
Contextual Info: SN54/74LS192 SN54/74LS193 PRESETTABLE BCD/DECADE UP/DOWN COUNTER PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER PRESETTABLE BCD/ DECADE UP/ DOWN COUNTER PRESETTABLE 4-BIT BINARY UP/ DOWN COUNTER The SN54/74LS192 is an UP/DOWN BCD Decade 8421 Counter and the SN54/74LS193 is an UP/DOWN MODULO-16 Binary Counter. Separate

74LS192

Abstract: 74LS192 PIN diagram 74LS192 truth table 74LS193 pin data 74ls193 pin diagram TTL 74ls193 74LS193 truth table 74LS192 INTERNAL DIAGRAM 74LS192 table 74LS193
Contextual Info: SN54/74LS192 SN54/74LS193 PRESETTABLE BCD/DECADE UP/DOWN COUNTER PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER PRESETTABLE BCD / DECADE UP/ DOWN COUNTER PRESETTABLE 4-BIT BINARY UP/ DOWN COUNTER The SN54/74LS192 is an UP/DOWN BCD Decade 8421 Counter and the SN54/74LS193 is an UP/DOWN MODULO-16 Binary Counter. Separate

IC 74LS192

Abstract: ic 74LS193 pin diagram 74LS192 INTERNAL DIAGRAM 74LS192 PIN diagram of 74LS193 IC counter 74LS192 truth table 74ls193 pin diagram pin diagram of 74LS192 74LS193 74LS192
Contextual Info: MOTOROLA SN54/74LS192 SN54/74LS193 PRESETTABLE BCD/DECADE UP/DOWN COUNTER PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER The SN54/74LS192 is an UP/DOWN BCD Decade 8421 Counter and the SN54/74LS193 is an UP/DOWN MODULO-16 Binary Counter. Separate Count Up and Count Down Clocks are used and in either counting mode the

74LS192 PIN CONFIGURATION

Contextual Info: LS TTL DN74LS Series DN74LS192 DN74LS192 lv>7^ i£ R % Synchronous BCD Up / Down Dual Clock Counters with Reset • Description P-2 D N 74LS192 is a synchronous decade u p/dow n counter w ith direct-coupled reset in p u t and set input. ■ • • • •

74LS193 truth table

Abstract: LS192 74LS192 truth table
Contextual Info: SN74LS192 PRESETTABLE BCD/DECADE UP/DOWN COUNTER PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER The SN54/74LS192 is an UP/DOWN BCD Decade 8421 Counter and the SN54/74LS193 is an UP/DOWN MODULO-16 Binary Counter. Separate Count Up and Count Down Clocks are used and in

400M

Abstract: DN74LS192
Contextual Info: DN74LS192 LS TTL DN74LS Series D N 7 4 L S 1 9 2 Synchronous B C D Up / Down Dual Clock Counters with R eset • P-2 Description D N 74LS192 is a synchronous decade up/dow n counter w ith direct-coupled reset in p u t and set input. ■ • • • • •

IC 74LS192

Abstract: 74ls183 74LS192 truth table 74LS193 pin data 74LS192 table 74LS193 truth table
Contextual Info: D ESCRIPTIO N — The SN54LS/74LS192 is an UP/DOWN BCD Decade {8421 Counter and the SN54LS/74LS193 is an UP/DOWN MODULO-16 Binary Counter. Separate Count Up and Count Down Clocks are used and in either counting mode the circuits operate synchronously. The outputs change state synchronous with the LOWto-HIGH transitions on the clock inputs.

74LS192 truth table

Abstract: 74LS193 truth table IC 74LS192 74LS192 table TTL 74ls193 74LS192 74LS193 74LS193 pin data motorola 74ls192 of ic 74ls193
Contextual Info: g MOTOROLA DESCRIPTION — The SN54LS/74LS192 is an UP/DOWN BCD Decade (8421) Counter and the SN54LS/74LS193 is an UP/DOWN MODULO-16 Binary Counter. Separate Count Up and Count Down Clocks are used and in either counting mode the circuits operate synchronously. The outputs change state synchronous with the LOWto-HIGH transitions on the clock inputs.

74192 internal diagram

Abstract: 74192FC 74LS192P 74LS192DC 74LS192 INTERNAL DIAGRAM 74192 counter
Contextual Info: 1 NATIONAL SEMICOND -CLOGIO DEE D | b S D U B S _ ~ T - 9 5 DDbBiei 5 | 3 -o 9 192 CO NN ECTIO N DIAGRAM PINO UT A 54/74192 54LS /74LS192 \ UP/DOWN DECADE COUNTER I P i[T 161Vcc o.QE H ] po Qo [T With Separate U p/D ow n Clocks

IC 74LS192

Abstract: mr25n
Contextual Info: Am25LSl92 •Am25LSl93 Am54LS/74LS192 •Am54LS/74LS193 Decimal and Hexadecimal Up/Down Counters D IS T IN C T IV E C H A R A C T E R IS T IC S F U N C T IO N A L D E S C R IP T IO N • Separate up and d o w n clo cks • A syn ch ro n o u s parallel load

74LS192 PIN diagram

Abstract: 74LS193 function table mr1520 74LS192 function table 74LS192 pins 74LS192 LS192 Am25LS193 74LS192 table 74LS193 pin data
Contextual Info: Am25LS192 • Am25LSl93 Am54LS/74LS192 • Am54LS/74LS193 D ecim al and H exadecim al U p /D o w n Counters D IS T IN C T IV E C H A R A C T E R IS T IC S F U N C T IO N A L D E S C R IP T IO N • • Separate up and d o w n clocks A syn ch ro n o u s p arallel load

ic 74192 pin diagram

Abstract: LA 4289 74192 ic 74192 counter ic 74192 74ls192 74192PC
Contextual Info: 192 C O N N E C T IO N DIAGRAM PINOUT A 54/74192 6 / * ° ^ 54LS/74LS192 O l o ü U ^ UP/DOWN DECADE COUNTER With Separate Up/Down Clocks P i[ T Tèi vcc o ,H H J po Qod 33 MR [7 T5] t c d CPd CPuU D ESCRIPTIO N — T h e ’ 192 is an u p /d o w n B C D d e c a d e (8421) co u n ter. S e p a ­

ic 74192 pin configuration

Abstract: pin diagram of counter ic 74193 ic 74193 ic 74192 ic 74192 pin diagram 74192 ic TTL 74192 ttl 74193 74192 pin configuration IC 74LS192
Contextual Info: Sìgnetìcs 74192, 74193, LS192, LS193 Logic Products FEATURES • Synchronous reversible 4-bit binary counting • Asynchronous parallel load • Asynchronous reset clear • Expandable without external logic 1 Counters TYPE TYPICAL fMAX TYPICAL SUPPLY CURRENT

74193 pin configuration

Abstract: ic 74192 74LS192 PIN CONFIGURATION ic 74193 ic 74192 pin configuration IC 74LS192 pin configuration of 74193 74 LS 193 Logic DIAGRAM ttl 74193 74193 state diagram
Contextual Info: Signetics 74192, 74193, LS192, LS193 Logic Products FEATURES • Synchronous reversible 4-bit binary counting • Asynchronous parallel load • Asynchronous reset clear • Expandable without external logic DESC RIPTIO N The ' 192 and ’ 193 are 4-bit synchronous

IC 74LS192

Abstract: ic 74193 74193 state diagram 74193 pin configuration ic 74192 pin configuration 74192 ic pin diagram of counter ic 74193 ic 74192 74192 of ic 74ls193
Contextual Info: 7 4 1 9 2 , 7 4 1 9 3 , LS192, LS193 Signelics Counters '192 Presettable BCD Decade Up/Down Counter '193 Presettable 4-Bit Binary Up/Down Counter Product Specification Logic Products FEATURES TYPE • Synchronous reversible 4-bit binary counting TYPICAL fMAx

IC AND GATE 7408 specification sheet

Abstract: 74LS183 74LS96 SN 74168 7486 XOR GATE IC 74LS192 IC 7402, 7404, 7408, 7432, 7400 IC 7486 for XOR gate IC 74183 74LS193 function table
Contextual Info: PLS-EDIF Bidirectional EDIF Netlist Interface to MAX+PLUS Software Data Sheet September 1991, ver. 3 Features u J Provides a bidirectional netlist interface b etw ee n M A X + P L U S and other m ajor C A E softw are packages Sup ports the industry-standard Electronic Design Interchange Format

74L193

Abstract: SN74L193 SN54119 ic 74192 SN741S193 LS 7313 - S SJ74193 sn74l192 SN741S2 LS 7313 S
Contextual Info: TYPES SKS4192. SN54193, SW54L192. SN54LÎ93, SN54LS192, SN54LS193 SN74Î92, SJ74193, SH74LW2. SN74L193, SN74LS192, SN74LS193 SYNCHRONOUS 4-BÎT UP/DOWN COUNTERS DUAL CLOCK WITH CLEAR B U L L E T I N N O . 0 1 - 8 7 7 1 1«3». O E C E M B E W 1 » 7 2 -W li V IS E D A U G U S T 1877

ic 74192

Abstract: pin diagram of counter ic 74193 LM 74192 ic 74192 pin configuration ic 74193 74192 counter 74192 pin configuration 74193 pin configuration 74192 ic 74192
Contextual Info: 74192, 74193, LS192, LS193 Signetics Logic Products 1 Counters FEATURES TY PE • Synchronous reversible 4-bit binary counting • Asynchronous parallel load • Asynchronous reset clear • Expandable without external logic T Y P IC A L f „ AX T Y P IC A L SU PP LY C U R R E N T

TC74HC192P

Contextual Info: TOSH IB A LOGIC/MEMORY IME D I 10172va ooiöiiü t| TC74HC192P/F TC74HC193P/F 'P'is-z.j -oq TC74HC192P/F SYNCHRONOUS UP/DOWN DECADE COUNTER TC74HC193P/F SYNCHRONOUS UP/DOWN BINARY COUNTER The TC74HC192 and TC74HC193 are high speed CMOS SYNCRONOUS 4-BIT UP/DOWN COUNTERS1

LS192

Abstract: LS193 SN54192 SN54193 SN54LS192 SN54LS193 SN74192 SN74193 SN74LS193 XS192
Contextual Info: SN54192, SN54193, SN54LS192 SN54LS193, SN74192, SN74193, SN74LS192, SM74LS193 SYNCHRONOUS 4-BIT UPfDOWN COUNTERS DUAL CLOCK WITH CLEAR D E C E M B E R 1 9 7 2 - R E V IS E D M A R C H 1 98 8 ' • Cascading Circuitry Provided internally SN 54192, SN 54193, SN 54LS192,

tt 2246

Abstract: 74LS192 PIN CONFIGURATION
Contextual Info: M IT S U B IS H I HIGH SPEED CMOS t$ í M74HC192P/FP/DP PR E S E TT A B LE BCD U P/D O W N COUNTER W IT H R E S E T DESCRIPTION T h e M 7 4 H C 1 9 2 is a sem iconductor in teg rated circuit con­ PIN CONFIGURATION TOP VIEW sisting of a synchronous d ecim al u p /d o w n counter with re ­

74LS192 truth table

Abstract: TC74HC192AP TC74HC192A TC74HC192 c1s3a pin diagram of 74LS192
Contextual Info: TOSHIBA TC74HC192AP/AF TC74HC193AP/AF/AFN TC74HC192 Synchronous Up/Down Decade Counter TC74HC193 Synchronous Up/Down Binary Counter The TC74HC192A/193A are high speed CMOS SYNCHRONOUS 4-BU UP/DOWN COUNTER fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent

Contextual Info: TC74HC192AP/AF TC74HC193AP/AF/AFN T C 7 4 HC 19 2 AP / AF SYNCHRONOUS UP/DOWN DECADE COUNTER TC74HC193AP/AF/AFN SYNCHRONOUS UP/DOWN B IN A R Y COUNTER The TC74HC192A/TC74HC193A are high speed CMOS SYNCHRONOUS 4-B IT UP/DOW N COUNTER fabricated with silicon gate C2MOS technology.

L-53ID-B-TNR2.54

Abstract: 74ls32 74ls192 ic 74ls13 L-934SYD-TNR2.54 54/74S508 L-3WEGW-TNR2.54
Contextual Info: 54/74LS ELECTRICAL CHARACTERISTICS See Notes - Page 50 INPUT VOLTAGE (V) PARAMETER INPUT CURRENT OUTPUT VOLTAGE <V) V lL VIH V ,C VOL Vo« I]L.(m A) IlH (MA) LOW LEV EL HIGH LEV EL CLAMP VOLTAGE LOW HIGH LEVEL LEV EL LOW LEV EL HIGH LEVEL Vcc=M AX Vi l =.4V