74LS10 IC Search Results

lm294oct

Abstract: d71054c D71055C lm294oct-12 74c928 7486 XOR GATE interfacing ADC 0808 with 8086 microprocessor 555 7490 7447 7 segment LED display Motorola 74LS76 NEC D71055C
Contextual Info: Integrated Circuits 74LS Series Featuring better performance than standard 7400 series devices, the 74LS series also uses about 1/5th the power. Part# Pins Description 74LS00 74LS01 74LS02 74LS03 74LS04 74LS05 74LS06 74LS07 74LS08 74LS09 74LS10 74LS11 74LS12

74LS10 pin configuration

Contextual Info: GD54/74LS10 TRIPLE 3-INPUT POSITIVE NAND GATES Description Pin Configuration This device contains three independent 3-input NAND gates. It performs the Boolean functions Y = A B C or Y = Â + B + Ü in positive logic. Vcc 1C 1Y 3C 3B 3A 3Y 14 13 12 11 10 9

DN74LS10

Abstract: MA161
Contextual Info: I LS TTL DN74LS Series DN74LS10 DN74LS10 T riple 3 - input P o sitiv e NAND Gates • Description D N 74LS10 contains three 3-input positive isolation NAND gate circuits. ■ Features • • • • Low pow er consum ption P,j = 6mW typical High speed ( tpd = 10ns typical)

ttl 74ls10

Abstract: truth table NOT gate 74 74LS10 74LS10 truth table 751A-02 SN54-74LS10 74LS10 TTL 3 input nand gate 74LS10
Contextual Info: SN54/74LS10 TRIPLE 3-INPUT NAND GATE TRIPLE 3-INPUT NAND GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN

74ls08n

Abstract: 74ls04n 74LS14N 74LS07N 74LS05N 74LS11N 74ls06n 74LS02N IC 74LS14 74ls04 hex inverter
Contextual Info: Standard Logic Call us to see if you can save 10-20%. 74F Series Continued – General purpose family of high speed advanced bipolar logic DIP SOIC Save Up To 20% When Purchasing Texas Instruments Products. Save Up To 30%! Jameco Value Offering Jameco now offers two ways to save! Our selection of Texas Instruments products will save you

IC 7410

Abstract: 7410 JRC IC 7430 IC 7420 IC 7400 nand OF IC 7410 7410 ic ls 7400 hc 7400 7410 1c
Contextual Info: - 25- Triple 3 Input NAND 7410 Vcc 1C IV ac 38 3A 3Y ninininiLriiniriif ft IB 2A 2B 2C 2Y GND O Y = A •B •C 74S10 N LS ALS ALSK F S AS AC max L-*H T 22 15 11 8 6 4.5 4.5 11.1 12. 3,24 30 ns tpd max H—»L 1 15 15 10 7 5. 3 5 4.5 11.1 12.3 24 30 ins IN

Contextual Info: SbE D • OOBTTSB b?T ■ SGTH S C S -T H O M S O N M54HC10 M74HC10 G S-THOnSON T - ¥ 3 -Zl TRIPLE 3-INPUT NAND GATE ■ HIGH SPEED tpD = 8 ns TYP. at VCc = 5V ■ LOW POWER DISSIPATION Ice = 1 n * (MAX.) at TA = 25°C ■ HIGH NOISE IMMUNITY V n IH = V n i L= 28% Vc c (MIN.)

7404 TTL CMOS

Abstract: TTL 7400 fairchild TTL 74h04 7404 ttl inverter TTL 7404 fairchild 9016 CI 74LS00 TTL 7404 fairchild 74H00 TTL TTL 9016 fairchild TTL 7401
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D1 9016, 9S04, 54/7404, 54H/74H04, 54S/74S04, 54LS/74LS04, 9017, 9S05A, 54/7405, 54H/74H05, 54S/74S05, 54L8/74LS05, 54/7406, 54/7414, 54LS/74LS14, 54/7416 D2 9002, 54/7400, 54H/74H00, 54S/74S00, 54LS/74LS00, 9012,

74hct10m

Contextual Info: fZ7 SGS-THOMSON M54HCT1o M74HCT10 Ä 7# TRIPLE 3-INPUT NAND GATE • HIGHSPEED tPD = 11 ns TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 1 uA (MAX.) AT T a = 25 *C ■ COMPATIBLE WITH TTL OUTPUTS V ih = 2V (MIN.) V il = 0.8V (MAX) ■ OUTPUT DRIVE CAPABILITY

Contextual Info: S G S -T H O M S O N iD œ a iÊ T IM D Ê I M54HC10 M74HC10 TRIPLE 3-INPUT NAND GATE • HIGHSPEED tpD = 6 ns TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Icc = 1 HA (MAX.) AT TA = 25 "C ■ HIGH NOISE IMMUNITY V nih = V nil = 28 % Vcc (MIN.) ■ OUTPUT DRIVE CAPABILITY

M54HC10

Abstract: M54HC10F1R M74HC10 M74HC10B1R M74HC10C1R M74HC10M1R 74hc10
Contextual Info: M54HC10 M74HC10 TRIPLE 3-INPUT NAND GATE . . . . . . . . HIGH SPEED tPD = 6 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE

M54HCT10

Abstract: M54HCT10F1R M74HCT10 M74HCT10B1R M74HCT10C1R M74HCT10M1R 74ls10 IC
Contextual Info: M54HCT10 M74HCT10 TRIPLE 3-INPUT NAND GATE . . . . . . . HIGH SPEED tPD = 11 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS

74LS10

Contextual Info: SA NY O SEMICONDUCTOR là e d~| ? cn 7 D 7 b CORP G o p a b a a '3 I LC74HC10M C M O S High-Speed Standard Logic L C 7 4 H C Series 3034A i .¡S' * *• * , Triple 3-Input NAND Gate Z 14 1 A . Features ' " • The L C 7 4 H C 1 0 M consists o f 3 identical 3-input N A N D gates.

Contextual Info: AVG Semiconductors DDiT Technical Data DV74LS10 DV74ALS10A Triple 3-Input NAND Gates N Suffix Plastic DIP AVG-001 Case This device contains three independent gates, each of which performs the logic NAND function. AVG’s LS operates over extended Vcc from 4.5 to 5.5 V

54L10

Abstract: IC-133 SN74H10
Contextual Info: TYPES SN5410, SN54H10, SN54L10, SN54LS10, SN54S10. SN7410, SN74H10, SN74LS10, SN74S10 TRIPLE 3-INPUT POSITIVE-NAND GATES R EV ISED DECEM BER 1983 Package Options Include Both Plastic and Ceram ic Chip Carriers in Addition to Plastic and Ceramic DIPs SIM5 4 1 0 , S N B 4 H 1 0 , S N 5 4 L 1 0 . . . J P A C K A G E

Contextual Info: SCSTHOMSON E l M 54HC 10 M 74H C 10 m TRIPLE 3-INPUT NAND GATE HIGH SPEED tpo = 8 ns TYP. at Vcc = 5V LOW POWER DISSIPATION lCC = 1 /*A (MAX.) at Ta = 25°C HIGH NOISE IMMUNITY 1 V n i H = v N IL = 2 8 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS

74LS10

Abstract: DIP14-P-300-2 TC74HC10A TC74HC10AFN TC74HC10AP
Contextual Info: TOSHIBA TC74HC10AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC10AP, TC74HC10AF, TC74HC10AFN Note The JEDEC SOP (FN) is not available in Japan. TRIPLE 3 -IN P U T NAND GATE The TC74HC10A is a high speed CMOS 3-INPUT NAND GATE fabricated with silicon gate C2MOS technology.

Contextual Info: - TC74HC10AP/AF/AFN TRIPLE 3-INPUT NAND GATE The TC74HC10A is a high speed CMOS 3-IN P U T N AN D G A TE fabricated w ith silicon gate C^M O S technology. It achieves the high speed operation sim ilar to equivalent LSTTL while m ain tain in g the CMOS low power

of IC 74ls10

Abstract: hc154 hc 154
Contextual Info: TC74HC1OAP/AF/AFN TRI PLE 3-INPUT NAND GATE The TC74HC10A is a high speed CMOS 3 -IN P U T N A N D G A TE fab rica te d w ith silicon g ate C 2 MOS technology. It achieves the high speed o p eratio n s im ila r to equivalent L STT L w hile m a in ta in in g th e CMOS low pow er

CI 74ls10

Abstract: TTL 74ls10
Contextual Info: SANYO SEMICONDU CT OR CORP S3E D • m i Q l h 0010375 ST7 « T S A J T - H 3 - [O rde ring number: E N 3 6 9 5 MLC74HC10M No.3695 CMOS High-Speed Standard Logic Triple 3-Input NAND Gate F e a tu re s ■The MLC74HC10M consists of 3 identical 3-input NAND gates.

74ls163 function table

Contextual Info: GD54/74LS163A SYNCHRONOUS 4-BIT COUNTER: BINARY, SYNCHRONOUS CLEAR Feature • • • • • • Pin Configuration Internal Look-Ahead for Fast Counting Carry Output for n-Bit Cascading Synchronous Counting Synchronously Programmable Load Control Line Diode-Clamped Inputs

IC AND GATE 7408 specification sheet

Abstract: 74LS183 74LS96 SN 74168 7486 XOR GATE IC 74LS192 IC 7402, 7404, 7408, 7432, 7400 IC 7486 for XOR gate IC 74183 74LS193 function table
Contextual Info: PLS-EDIF Bidirectional EDIF Netlist Interface to MAX+PLUS Software Data Sheet September 1991, ver. 3 Features u J Provides a bidirectional netlist interface b etw ee n M A X + P L U S and other m ajor C A E softw are packages Sup ports the industry-standard Electronic Design Interchange Format

Contextual Info: TOSHIBA TC74HC10AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC10AP, TC74HC10AF, TC74HC10AFN TRIPLE 3 -IN P U T NAND GATE Note The JEDEC SOP (FN) is not available in Japan. The TC74HC10A is a high speed CMOS 3-INPUT NAND GATE fabricated with silicon gate C2MOS technology.

Contextual Info: V TC74HC10AP/AF/AFN TRIPLE 3-INPUT NAND GATE T h e T C 7 4 H C 1 0 A is a h i g h s p e e d C M O S 3 - I N P U T NAND GATE f a b r i c a t e d w ith silic o n g a t e C 2 M O S t e c h n o lo g y . It a c h ie v e s the h ig h s p e e d o p e r a ti o n s i m i l a r to