74LS0 Search Results

Contextual Info: SA NY O SEMICONDUCTOR 15E D I CORP 7 clci7G7b O O O S b O D LC74HC02 3003A *• v ’ ~ CM O S High-Speed Standard Logic LC74HC Series Quad 2-Input N O R Gate 16958 Features The LC74HC02 consists of 4 identical 2-input NOR gates. Uses CMOS silicon gate process technology to achieve operating speeds similar to LS-TTL 74LS02 with the

IC AND GATE 7408

Abstract: TTL 7408 IC AND GATE 7408 pin configuration LM 7408 IC 7408 TTL 7408 AND propagation delay function IC 7408 74LS08 pin configuration IC PIN CONFIGURATION OF 74LS08 IC 7408 and function
Contextual Info: Sjgnetics I 7408, LS08, S08 Gates Quad Two-Input AND Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7408 16ns 16mA 74LS08 9ns 3.4mA 74S08 5ns 25mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5%; TA = 0°C to +70“C

7403PC

Abstract: 74LS03 74LS03PC 7403DC 7403FC 74LS03DC 74LS03FC 74S03DC 74S03FC 74S03PC
Contextual Info: 03 C O N N E C T IO N D IA G R A M P IN O U T A 54/7403 v * _ '-'54S/74S03 54LS/74LS03 rs/'J? • Q U A D 2 -IN P U T N AN D GATE W ith O p e n -C o lle cto r Output O R D E R IN G C O D E : See S e ctio n 9 PIN PKGS OUT C O M M E R C IA L GRADE M ILITA R Y G RADE

lm 74ls04

Abstract: LC74HCU04 74LS04 T370
Contextual Info: 1 1 bA N Y O 1 LC74HCU04 Na 1694 - :3 1 a r 8275 • O * ! " » - X He o I il X m o s y ^r t ï c: e K a l 694 •LC74HCU04 fj /t "/ 7 7 t ■i' y - c mos *s * 3 y v — — ? -Ç* | -t x ï - f i f f l u 6 E w a i mos i c <3 0 LSTTL 74LS04) *§ ^ <

74LS00P

Abstract: 74LS00 pinout 74LS00 fan-out 74LS00 7400 74S00 7400 fan-out 74LS00PC 7400PC 74LS00 74LS00D 74LS00DC
Contextual Info: 00 CO NNECTIO N DIAGRAMS PINOUT A 54/7400 ^ o n et* 54H /74H 00Ä eU9 5 4 S /7 4 S 0 0 ^' /V 54LS/74LS00^'/ bUi QUAD 2-INPUT NAND GATE ORDERING CODE: See Section 9 CO M M ERCIAL GRADE PIN PKGS Vcc = +5.0 V ±5%, = 0° C to +70° C OUT M ILITARY GRADE Vcc = +5.0 V ±10%,

Contextual Info: GD54/74LS05 HEX INVERTERS WITH OPEN-COLLECTOR OUTPUTS D escrip tion This device contains six idenpendent inverts. It perform s the Boolean function Y = A. T he open col­ lector outputs require pull-up resistor to perform cor­ rectly. O pen -co llector d evices are often used to

74LS08 pin configuration

Abstract: 74LS08 function table
Contextual Info: GD54/74LS08 QUADRUPLE 2-INPUT POSITIVE AND GATES Description Pin Configuration This device contains four independent 2-input AND gates. It performs the Boolean functions Y = A B or Y = A + B in positive logic. Vcc 4B 4A 4'i 3B 3A 3Y 14 13 12 1 10 9 8 i - Function Table each gate

ALU IC 74181

Abstract: 74181 ic pin diagram DS 7409 7480 full adder 1 bit 74LS86 full adder IC 74181 7411 3 INPUT AND gate TTL 74ls83 pin diagram of 7411 logic diagram of 7432
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 Vcc Vcc 1^1FH [iä| [vii Eòi [T| r»1 füi Fai np f i ! Föi lyi rn

Contextual Info: GD54/74LS06 HEX INVERTED BUFFERS WITH OPEN-COLLECTOR OUTPUTS Features Pin Configuration • High Output Voltage 30V • High Speed(tPD= 8 .5 n S typical) • Low Power Dissipation (PD= 1 8 m W per Gate) Voc OUTPUT 1A H L L H 5Y 4A 4Y l]> o J [> 1 l> 1 Ö

74ls06

Contextual Info: GD54/74LS06 HEX INVERTED BUFFERS WITH OPEN-COLLECTOR OUTPUTS Features Pin Configuration • High Output Voltage 30V • High Speed(tPD=8.5nS typical) • Low Power Dissipation(PD=18m W per Gate) V cc 6A 6Y 5A 5Y 4A 4Y Description This device contains hex inverted buffers with

Contextual Info: GD54/74LS09 QUADRUPLE 2-INPUT POSITIVE AND GATES WITH OPEN-COLLECTOR OUTPUTS Description Pin Configuration This d evice contains four ind epen den t 2-input AND gates. It performs the Boolean functions Y = A • B or Y = A + B in positive logic. T h e open-collector out­

truth table NAND gate 74

Abstract: SN54LSXXJ SN74LSXXN SN74LSXXD 751A-02
Contextual Info: M M O T O R O L A SN54/74LS01 QUAD 2-INPUT NAND GATE E S D > 3 5 0 0 Volts Q UAD 2-IN P U T N AND GATE LOW POWER SCHOTTKY VCC fïïl pial [ïï] |~M~| fTöl ry i n n LU lI i lJ j J SUFFIX CERAMIC CASE 632-08 [±J l L i lJ j U d GND •OPEN COLLECTOR OUTPUTS

TTL 7408

Abstract: TTL LS 7408 ls 7408 7408 AND GATE 3 input and gate 7408 7408 7408 TTL TTL 7408 AND propagation delay logic symbol 74LS08 74LS08 signetics
Contextual Info: Sjgnetìcs 7408, LS08, S08 Gates Quad Two-Input AND Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7408 15ns 16mA 74LS08 9ns 3.4mA 74S08 5ns 25mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5% ; T a = 0°C to + 70°C

74LS02 truth table

Abstract: TTL 74ls02 74LS02 74LS02 TTL 751A-02 motorola 74LS02
Contextual Info: M MOTOROLA SN54/74LS02 QUAD 2-INPUT NOR GATE Q UAD 2-IN P U T NOR GATE vc c LOW POWER SCHOTTKY nu rii [ïïi M N m m -<SJ L<3L r?i r?i t J SUFFIX CERAMIC CASE 632-08 LU LU LU LU LU LiJ LzJ GND N SUFFIX „n p rïï csss, D SUFFIX S0IC * CASE 751A ORDERING INFORMATION

7400 signetics

Abstract: 74LS00 7400 74S00 74LS00 function table 7400 pin configuration N7400N TTL 7400 propagation delay 74LS00 DATA TTL 7400 7400 signetics TTL 74LS00
Contextual Info: Signetics I 7400, LS00, S00 Gates Quad Two-Input NAND Gate Product Specification Logic Products TYPE TY PIC A L PR O PAG ATIO N D ELAY 7400 74LS00 74S00 TY P IC A L S U P P LY C U R R E N T TO TAL 9ns 8m A 9.5 n s 1.6m A 3n s 15m A ORDERING CODE C O M M ER C IA L R A N G E

74LS03 truth table

Abstract: truth table NAND gate 74 SN54LSXXJ SN74LSXXN SN74LSXXD 751A-02 74LS03
Contextual Info: M MOTOROLA SN54/74LS03 QUAD 2-INPUT NAND GATE • E S D > 3 5 0 0 V o lts Q UAD 2-IN P U T NAND GATE LOW POWER SCHOTTKY VCC M [ïïl F iz l fy i~ l H oi [T | r n j LiyJ LedJ J SUFFIX C E R A M IC C A SE 632-08 LU LiJ LU LU LU LU LU GND *0 P E N COLLECTOR OUTPUTS

TTL 7408

Abstract: 7408 pin configuration 7408 TTL TTL 7408 AND propagation delay 74LS08 fan-out 7408 74S08 74ls08 7408 7408 AND GATE ls 7408 74LS08 signetics
Contextual Info: Signetics 7408, LS08, S08 Gates Quad Two-Input AND Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7408 15ns 16mA 74LS08 9ns 3.4mA 74S08 5ns 25mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5% ; T a = 0°C to + 70°C

74LS08 TTL

Abstract: TTL 74ls08 74Ls08 truth table motorola 74LS08 74LS08 74ls08 AND Gate 74LS08DC 751A-02 not 74Ls08
Contextual Info: M MOTOROLA SN54/74LS08 QUAD 2-INPUT AND GATE Q UAD 2-IN P U T A ND GATE Vcc LOW POWER SCHOTTKY LU LU LU LU Lü L§J J SUFFIX CERAMIC CASE 632-08 LzJ GND JfflP N SUFFIX JÜSS. D SUFFIX s o ie CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN SN74LSXXD

7402 pin configuration

Abstract: TTL 7402 7402 TTL specification of 74ls02 7402 nor 7402 signetics 7402 NOR gate 74LS02 pin configuration 7402 7402 quad 2 input not
Contextual Info: 7402, LS02, S02 Signetics Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V +5 % ; T a = 0°C to + 7 0 “C

74LS05 equivalent

Abstract: LS 7405 TTL LS 7405 7405 7405 signetics 74LS 74LS05 74S05 LS05 N7405N
Contextual Info: 7405, LS05, S05 Signetics Inverters Hex Inverter Open Collector Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 7405 40ns (tPLH) 8ns (tpHL) 12mA 74LS05 17ns 15ns 2.4mA 74S05 5ns ( t p L H ) 4.5ns ( t p H L )

7402 TTL

Abstract: 7402 TTL 7402 7402 pin configuration 74LS02 function table 74LS02 pin configuration 7402 signetics TTL specification of 74ls02 7402 nor 74S02
Contextual Info: Signetics I 7402, LS02, S02 Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPE TYPICAL SUPPLY CURRENT TOTAL TYPICAL PROPAGATION DELAY 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE VCc = 5V ±5% ; T a = 0°C to +70°C

74LS00 pin configuration

Abstract: gd74ls04 74LS00 function table 74LS00 pin configuration 74LS00 74LS00 Electrical and Switching characteristics 74LS04 NOT gate GD74LSOO 74LS00 clock frequency pin configuration 74LS04
Contextual Info: GD54/74LS00 QUADRUPLE 2-INPUT POSITIVE NAND GATES Description This device contains four independent 2-input NAND gates, jt^ performs the Boolean functions Y = A B or Y = A + B in positive logic. Pin Configuration V cc 4B 4A 4Y 3B 3A 3Y 1B tY 2A 2B 2Y GND Function Table each gate

TTL 74ls08

Abstract: 74Ls08 truth table ic 74LS08 motorola 74LS08 ic 74LS08 ttl 74LS08 TTL 74ls08 AND Gate 74ls08 all gate ic data 74
Contextual Info: <g> MOTOROLA SN54/74LS08 QUAD 2-INPUT AND GATE QUAD 2-INPUT AND GATE vcc LO W PO W ER SC HO TTK Y R [ÏÏ1 nil rrn rröi nn m LU LLI LiJ 111 Lil LiJ J SUFFIX CERAMIC CASE 632-08 Ll I GND N SUFFIX PLASTIC CASE 646-06 D SUFFIX SOIC CASE 751A-02 O R D E R IN G IN F O R M A T IO N

74LS00 TTL

Abstract: 74LS00 truth table IC TTL 74LS00 74LS00 74LS00 QUAD 2-INPUT NAND GATE TTL 74ls00 74LS00DC motorola 74LS00 74ls00 NAND gate 74LS00 DATA
Contextual Info: MOTOROLA SN54/74LS00 QUAD 2-INPUT NAND GATE • ESD > 3500 Volts QUAD 2-INPUT NAND GATE LOW POWER SCHOTTKY VCC fn l [ïïl fïïl [Til fïïl ITI 171 J SUFFIX CERAMIC CASE 632-08 Lü Ll I Ll I L±l Ll I Ll I LzJ GND N SUFFIX ,r p îïï „ 'S :. D SUFFIX