74LCX125M Search Results

H4-16

Contextual Info: 74LCX125 Low-voltage CMOS quad bus buffer 3-state with 5 V tolerant inputs and outputs Datasheet − production data Features • 5 V tolerant inputs and outputs ■ High speed – tPD = 5.2 ns (max) at VCC = 3 V ■ Power-down protection on inputs and outputs

74LCX125

Abstract: 74LCX125BQX 74LCX125M 74LCX125MTC 74LCX125SJ LCX125 M14A M14D MTC14 74LCX125BQ
Contextual Info: 74LCX125 Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs Features General Description • 5V tolerant inputs and outputs The LCX125 contains four independent non-inverting buffers with 3-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V

5555 FAIRCHILD optocoupler

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Contextual Info: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference

sharc ADSP-21xxx general block diagram

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Contextual Info: ADSP-21065L EZ-KIT Lite Evaluation System Manual Part Number: 82-000490-01 Revision 2.0 January 2003 Notice Analog Devices, Inc. reserves the right to make changes to or to discontinue any product or service identified in this publication without notice. Analog Devices assumes no liability for Analog Devices applications assistance, customer product design,

Contextual Info: A I R C H March 1995 I L D Revised March 1999 S E M [CONDUCTOR TM 74LCX125 Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs General Description • 6.0 ns tpD max V qq = 3.3V , 10 pA lcc max The LCX125 contains four independent non-inverting buff­

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Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
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Arduino Mega2560

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74LCX125

Abstract: 74LCX125M 74LCX125MTR 74LCX125TTR TSSOP14
Contextual Info: 74LCX125 LOW VOLTAGE CMOS QUAD BUS BUFFER 3-STATE WITH 5V TOLERANT INPUTS AND OUTPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS AND OUTPUTS HIGH SPEED : tPD = 5.2 ns (MAX.) at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE:

SGS 7040

Abstract: 74LCX14FT MOS-FET 13007 RCA 8 way video splitter circuit diagram sharc ADSP-21xxx general block diagram sharc ADSP-21xxx architecture internal diagrams PCC473BCTND PC16550DV stereo plug 3.5mm db9f DIP8 package EZ 531
Contextual Info: ADSP-21065L EZ-KIT Lite Evaluation System Manual Part Number: 82-000490-01 Revision 1.0 December 2000 Notice Analog Devices, Inc. reserves the right to make changes to or to discontinue any product or service identified in this publication without notice.

st lcx125

Contextual Info: 74LCX125 Low-voltage CMOS quad bus buffer 3-state with 5 V tolerant inputs and outputs Datasheet − production data Features • 5 V tolerant inputs and outputs ■ High speed – tPD = 5.2 ns (max.) at VCC = 3 V ■ Power-down protection on inputs and outputs

LCX125

Abstract: 74LCX125 74LCX125M 74LCX125MTC 74LCX125MTCX 74LCX125MX 74LCX125SJ 74LCX125SJX M14A M14D
Contextual Info: 74LCX125 Low-Voltage Quad Buffer with 5V Tolerant Inputs and Outputs Y General Description Y The LCX125 contains four independent non-inverting buffers with TRI-STATE outputs The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems

74LCX125

Abstract: 74LCX125M 74LCX125MTR 74LCX125TTR TSSOP14
Contextual Info: 74LCX125 LOW VOLTAGE CMOS QUAD BUS BUFFER 3-STATE WITH 5V TOLERANT INPUTS AND OUTPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS AND OUTPUTS HIGH SPEED : tPD = 5.2 ns (MAX.) at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE:

LCX125

Abstract: 74LCX125M 74LCX125 74LCX125MTC 74LCX125SJ M14A M14D MTC14 lcx125 pin diagram
Contextual Info: 74LCX125 Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs General Description The LCX125 contains four independent non-inverting buffers with 3-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

Contextual Info: S E M IC O N D U C T O R Revised April 1999 TM General Description • 6.0 ns tpQ max V qq = 3.3V , 10 ^iA Iqq max The LCX125 contains four independent non-inverting buff­ ers with 3-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

Contextual Info: 74LCX125 Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs Features General Description • 5V tolerant inputs and outputs The LCX125 contains four independent non-inverting buffers with 3-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V

lcx125

Abstract: Scans-0018600 74LCX125 74LCX125M 74LCX125MTC 74LCX125MTCX 74LCX125MX 74LCX125SJ 74LCX125SJX M14A
Contextual Info: LCX125 & N ational Semiconductor 74LCX125 Low-Voltage Quad Buffer with 5V Tolerant Inputs and Outputs General Description The LCX125 contains four independent non-inverting buff­ ers with TRI-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

M74LCX125

Contextual Info: S E M I C O N D U C T D R Revised April 1999 tm The LCX125 contains four independent non-inverting buff­ ers with 3-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3 V systems. • Powerdown high impedance inputs and outputs

Contextual Info: 74LCX125 Low-voltage CMOS quad bus buffer 3-state with 5 V tolerant inputs and outputs Datasheet − production data Features • 5 V tolerant inputs and outputs ■ High speed – tPD = 5.2 ns (max) at VCC = 3 V ■ Power-down protection on inputs and outputs

Contextual Info: •M ICO N DUCTO R r 74LCX125 Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs General Description The LCX125 contains four independent non-inverting buffers with 3-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

LCX125

Abstract: st lcx125 74LCX125 74LCX125M 74LCX125T TSSOP14
Contextual Info: 74LCX125 LOW VOLTAGE CMOS QUAD BUS BUFFERS 3-STATE WITH 5V TOLERANT INPUTS AND OUTPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS AND OUTPUTS HIGH SPEED: tPD = 6 ns (MAX.) at VCC = 3V POWER-DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE:

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Contextual Info: PowerPC 6xx/7xx CPC700 Reference Board Manual Version 2.4 Second Edition March 1999 The following paragraph does not apply to the United Kingdom or any country where such provisions are inconsistent with local law: INTERNATIONAL BUSINESS MACHINES CORPORATION PROVIDES THIS DOCUMENT “AS IS”

lcx125

Contextual Info: LCX12S ßN a t i o n a l S e m i c o n d u c t o r 74LCX125 Low-Voltage Quad Buffer with 5V Tolerant Inputs and Outputs Supports live insertion/withdrawal 2.0V-3.6V Vqc supply operation ± 24 mA output drive Implements patented Quiet Series noise/EMI reduc­

Q355

Contextual Info: S E M IC O N D U C T O R 74LCX125 Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs General Description The LCX125 contains lour independent non-inverting buffers with 3-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

74ls74apc

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