74HCT 347 Search Results

74ls180

Abstract: ic 74ls180 S-20M
Contextual Info: Technical Data File Number HARRIS CD54/74HC280 CD54/74HCT280 1669 SEMICOND SECTOR S7 E 4305571 ]> 0017754 T" H*5- 1H-00 High-Speed CMOS Logic F U N C T IO N A L DIA G R A M S jBHAS 9-Bit Odd/Even Parity Generator/Checker 1 Wide Operating Temperature Range:

ic 74ls180

Abstract: 74ls180
Contextual Info: Technical Data File Number CD54/74HC280 CD54/74HCT280 1669 High-Speed CMOS Logic FUNCTIONAL DIAGRAM 9-Bit Odd/Even Parity Generator/Checker • Wide Operating Temperature Ranve CD74HC/HCT: -40 to +85“ C “ Balanced Propagation and • Typical propagation delay = 17ns

smd 93 3Z

Abstract: MGR254 Functional details of ic 4066 4066 Handbook 74HC/HCT4066 4000B 74HC4066 74HCT4066 SSOP14 TSSOP14
Contextual Info: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications 74HC/HCT4066 Quad bilateral switches Product specification Supersedes data of 1998 Oct 02 File under Integrated Circuits, IC06

Functional details of ic 4066

Abstract: logic package information philips ic06
Contextual Info: INTEGRATED CIRCUITS Product specification Supersedes data of 1998 Oct 02 File under Integrated Circuits, IC06 Philips Sem iconductors 1998 Nov 10 PHILIPS Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4066 The 74HC/HCT4066 have four independent analog

Contextual Info: ^ Supertexinc. H C T 54 0 HCT541 O c t a l B u f f e r s / L i n e D riv e r s w i t h 3 -S ta te O u t p u t s Ordering Information Package 20-pin plastic DIP 20-pin C E R D IP 20-pin ceramic side-brazed DIP 20-pin ceramic leadless chip carrier Output* Commercial

Contextual Info: 74H C/H CT163 MSI PRESETTABLE SYNCHRONOUS 4-BIT BINARY COUNTER; SYNCHRONOUS RESET FEA TU RES • • • • • • T Y P IC A L Synchronous counting and loading T w o count enable inputs fo r n-bit cascading Positive-edge triggered clo ck Synchronous reset

74HC

Abstract: 74HCT Modulo-11 hct163
Contextual Info: 74HC/HCT163 MSI PRESETTABLE SYNCHRONOUS 4-BIT BINARY COUNTER; SYNCHRONOUS RESET FEATU R ES • • • • • • T Y P IC A L Synchronous counting and loading Two count enable inputs for n-bit cascading Positive-edge triggered clock Synchronous reset Output capability: standard

pin diagram of ic 74ls138

Abstract: connection diagram of ic 74ls138 t138 FUNCTIONAL APPLICATION OF 74LS138 74HC138 M74HCT13
Contextual Info: M54HCT138 M74HCT138 SGS-THOMSON 3 TO 8 LINE DECODER INVERTING . HIGH SPEED tPD = 16 ns (TYP.) at Vcc = 5 V . LOW POWER DISSIPATION Ice = 4 (iA AT TA = 25 "C . OUTPUT DRIVE CAPABILITY 10LSTTL LOADS • BALANCED PROPAGATION DELAYS tpLH = tPHL B1R (Plastic Package)

Contextual Info: ¿57 M54HCT138 M74HCT138 SGS-THOMSON ¡y 3 TO 8 LINE DECODER INVERTING • HIGH SPEED tpo = 16 ns (TYP.) at Vcc = 5 V ■ LOW POWER DISSIPATION Icc = 4 (iA AT Ta = 25 *C ■ OUTPUT DRIVE CAPABILITY 1 0 LSTTLLOADS ■ BALANCED PROPAGATION DELAYS tPLH = tP H L

74HCT258D

Abstract: 74HC258D 74HC258DB 74HC258N 74HCT258N SSOP16
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74HC/HCT258 Quad 2-input multiplexer; 3-state; inverting Product specification File under Integrated Circuits, IC06 1999 Sep 02 Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258

MAX5974

Contextual Info: 74HC/HCT163 MSI PRESETTABLE SYNCHRONOUS 4-BIT B INA RY COUNTER; SYNCHRONOUS RESET FE A T U R E S • • • • • • TYPICAL Synchronous counting and loading Tw o count enable inputs for n-bit cascading Positive-edge triggered clock Synchronous reset O u tput capability: standard

"9398 649 90011"

Abstract: 9046A 9398 649 90011 HCT9046A Low-pass Passive Filter Design Techniques "9398 961 10061"
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74HCT9046A PLL with bandgap controlled VCO Preliminary specification Supersedes data of September 1993 File under Integrated Circuits, IC06 Philips Semiconductors March 1994 Philips Semiconductors Preliminary specification PLL with bandgap controlled VCO

74HCT4046

Abstract: 4046a 9398 649 90011 kp 358 SMD transistor 74HCT9046A 74HCT9046AD 74HCT9046AN DIL16 MGA959
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74HCT9046A PLL with bandgap controlled VCO Product specification Supersedes data of March 1994 File under Integrated Circuits, IC06 1999 Jan 11 Philips Semiconductors Product specification PLL with bandgap controlled VCO 74HCT9046A

Contextual Info: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54/74HC4075, CD54/74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210C High Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised October 2002 Features

PCF6583

Abstract: PCD8583 ASM51 PCF8584 8051 Z80 i2c INTERFACING
Contextual Info: A p plicatio n Note Philips S e m icond uctors Interfacing the PCF8584 l2C-bus controller to 80C51 family microcontrollers DESCRIPTION T his application note show s how to use the PC F8584 l2C -bus controller w ith 80C51 fam ily m icrocontrollers. O ne typical w a y of

transistor z0127 MA

Abstract: ImpacTV2 YM 1104 YAMAHA CLEVO htc hd2 LCD flex connector MD7 LC 2716 2N007 VCC3 2456 23 new bright R288 RO5 9435
Contextual Info: 1 2 3 2800/2820/2850 4 5 Notebook Computer 6 7 Service Manual 8 i Preface NOTICE The company reserves the right to revise this publication or to change its contents without notice. Information contained herein is for reference only and does not constitute a commitment on the part of the manufacturer or any

Contextual Info: [ /Title CD74 HC195 /Subject (High Speed CMOS Logic 4-Bit Parallel Access Register) /Autho CD54HC195, CD74HC195 Data sheet acquired from Harris Semiconductor SCHS165E High-Speed CMOS Logic 4-Bit Parallel Access Register September 1997 - Revised October 2003

Contextual Info: [ /Title CD74 HC195 /Subject (High Speed CMOS Logic 4-Bit Parallel Access Register) /Autho CD54HC195, CD74HC195 Data sheet acquired from Harris Semiconductor SCHS165E High-Speed CMOS Logic 4-Bit Parallel Access Register September 1997 - Revised October 2003

Contextual Info: Signetics SCC68173 VMSbus Controller VMSCON Preliminary Specification Microprocessor Products THE VMSbus THE VMSbus provides a secondary con­ trol and data path in the backplane of V/MEbus systems, and can also be used in other backplanes and in 'intercrate1

wn 537 a

Abstract: 74HCT SCB68171 SCC68173C3I28 SCC68173C3N28
Contextual Info: SCC68173 VMSbus Controller VMSCON Preliminary Specification M icroprocessor Products THE VMSbus THE VMSbus provides a secondary con­ trol and data path in the backplane of VMEbus systems, and can also be used in other backplanes and in 'intercrate' (short inter-system) applications. Provid­

15jj

Abstract: scc68 74HCT SCB68171 SCC68173C3I28 DSAE
Contextual Info: Signetics SCC68173 VMSbus Controller VMSCON Preliminary Specification M ic ro p ro c e s s o r P ro d u cts THE VM Sbus THE VMSbus provides a secondary con­ trol and data path in the backplane of VMEbus systems, and can also be used h other backplanes and in 'intercrate'

7404 not gate

Abstract: CI 7404 7404 gate 7404 7404 ls functional DIAGRAM 7404 hct 347 ls 7404 74HC 74HCT
Contextual Info: NAP C/PHILIPS « « C O N » UE , . t b s 3 ,24 m t 1 M H m ziQ 3 P ro d u c t s p e c ific a tio n « B iW M W B — l P h ilip s S e m ic o n d u c to rs 74HC/HCT7404 5-Bit x 64-word FIFO register; 3-state FE A T U R E S im Q U IC K R E F E R E N C E D A TA

Contextual Info: -> G O U LD A M 1 «Semiconductors 16-Bit, 16 MSSelfCalibrating A/D Converter S5016 Features Beneral Description • Monolithic CMOS A/D Converter Microprocessor Compatible Parallel and Serial Output Inherent Track/Hold Input • True 16-Bit Precision Linearity Error: 0.001% FS

74HCT Logic Family Specification

Abstract: ani dam hoe no S5018 IF
Contextual Info: GOULD INC/ G O U L D A M I 4QE T> m tOSSSlk 001B108 1 « A M I T '- S H O •> GOULD -¡W 16-Bit, 16 SelfCalibrating A/D Converter A N I »Semiconductors S5016 Features General Description • Monolithic CMOS A/D Converter Microprocessor Compatible Parallel and Serial Output