74HC76 Search Results

74HC76

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC54/74HC76 Dual J-K Flip-Flop w ith Set and Reset J SUFFIX CERAMIC CASE 620-09 High-Performance Silicon-Gate CMOS T h e M C 5 4 /7 4 H C 7 6 is id e n tic a l in p in o u t to th e L S 7 6 . T h e d e v ic e in p u ts a re c o m ­

74HC76

Abstract: 54HC76 logic ic 74LS76 pin diagram Toggle flip flop IC
Contextual Info: M 54HC76 M 74HC76 S G S -T H O M S O N 1 L0 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR HIGH SPEED = 65 MHz (TYP. AT Vcc = 5 V LOW POWER DISSIPATION Ice = 2 nA (MAX.) AT 25 °C OUTPUT DRIVE CAPABILITY 10LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE I Io h I = Iol = 4 mA (MIN.)

74hct76

Abstract: Jk 74ls76 pin out HC76 74HC76 LS 74LS76 GD54/74HCT76 74HC GD54HC76 GD74HC76 74HC LOGIC PINOUT
Contextual Info: GD54/74HC76, GD54/74HCT76 DUAL J-K FLIP-FLOPS WITH PRESET & CLEAR General Description These devices are identical in pinout to the 54/74LS76. These flip-flops are edge sensitive to the clock input and change state on the negative go­ ing transition of the clock pulse. Each flip-flop has

circuit diagram of delay timer on off

Abstract: power off delay timer circuit diagram 74HC4078 74HC76 on delay timer circuit diagram X80140 ic timer 12v relay circuit diagram of delay timer on delay off 74hc76 datasheet and application notes power on delay timer circuit diagram
Contextual Info: Power Sequencing in Distributed Power Applications: Sequenced Turn-on of Seven DC/DC Power Supplies with Latched Shutdown Application Note April 26, 2005 AN161.0 Author: Carlos Martinez resequencing requires a separate reset signal or the main supply to be cycled off, then on.

M74HC76

Contextual Info: r z 7 S C S -T H O M S O N ^7# M54HC76 M 0 ^ sm ^iri«0 0 1 74HC76 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR HIGHSPEED fMAX = 65 MHz (TYP. AT Vcc = 5 V LOW POWER DISSIPATION Ice = 2 ^iA (MAX.) AT 25 °C OUTPUT DRIVE CAPABILITY 10 LSTTLLOADS SYMMETRICAL OUTPUT IMPEDANCE

74hc76

Abstract: M74HC76
Contextual Info: SbE D m 7^2^37 003^13 3^2 • SGTH S C S -T H O M S O N M54HC76 74HC76 S G S-THOMSON T-*t£-07-07 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR ■ HIGH SPEED fMAX = 60 MHz TYP. at Vc c = 5V ■ LOW POWER DISSIPATION lc c = 2 pJK (MAX.) at 25°C ■ OUTPUT DRIVE CAPABILITY

k2645

Abstract: k4005 U664B mosfet k4005 MB8719 transistor mosfet k4004 SN16880N stk5392 STR451 BC417
Contextual Info: 1 BHIAB Electronics Du som söker besvärliga IC & transistorer, börja Ditt sökande hos oss – vi har fler typer på lager än man rimlingen kan begära av ett företag Denna utgåva visar lagerartiklar men tyvärr saknas priser och viss information Men uppdatering sker kontinuerligt

TDA0161 equivalent

Abstract: 1N3393 BDX54F equivalent byt301000 bux transient voltage suppressor ST90R9 ua776mh sgs 2n3055 Transistor morocco mje13007 inmos transputer reference manual
Contextual Info: SHORTFORM 1995 NOVEMBER 1994 USE IN LIFE SUPPORT DEVICES OR SYSTEMS MUST BE EXPRESSLY AUTHORIZED SGS-THOMSON PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF SGS-THOMSON Microelectronics. As used herein:

74hc76

Abstract: M74HC76
Contextual Info: M54HC76 74HC76 / = T S G S -T H O M S O N G * [K 3 Q i[L [i(g ^ @ iO (g S DUAL J-K FLIP FLOP WITH PRESET AND CLEAR • HIGH SPEED fMAX = 60 MHz (TYP.) at VCC= 5V ■ LOW POWER DISSIPATION lCc = 2 nA (MAX.) at 25°C ■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS

74HC76

Abstract: DIP-20 M74HC7640 M74HC7640B1R M74HC7640M1R M74HC7640RM13TR M74HC7640TTR
Contextual Info: 74HC7640 OCTAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS INVERTING • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 13ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VH = 1.2 V (TYP.) at VCC = 6V SYMMETRICAL OUTPUT IMPEDANCE:

74HC76

Abstract: logic ic 74LS76 pin diagram pin diagram for IC 74ls76 74ls76 jk flip-flop logic symbol and truth table IC 74LS76 74LS76 IC M74HC76 M74HC76B1R 74Ls76 truth table M74HC76M1R
Contextual Info: M54HC76 74HC76 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR . . . . . . . . HIGH SPEED fMAX = 65 MHz TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 2 µA (MAX.) AT 25 °C OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.)

74HC76

Abstract: 74hc7645 DIP-20 M74HC7645 M74HC7645B1R M74HC7645M1R M74HC7645RM13TR M74HC7645TTR
Contextual Info: 74HC7645 OCTAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS NON INVERTED • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 13ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VH = 1.2 V (TYP.) at VCC = 6V SYMMETRICAL OUTPUT IMPEDANCE:

74HC76

Abstract: logic ic 74LS76 pin diagram M74HC76
Contextual Info: w # S G S -T H O M S O N k7Æ„ öiö g ®i[LI(g iO i M54HC76 74HC76 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR • HIGH SPEED fMAX = 60 MHz (TYP. at VCc = 5V ■ LOW POWER DISSIPATION Ice = 2 inA (MAX.) at 25°C ■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS

LM 4017 decade counter driver

Abstract: 74HC7244A 74HCT7007A 74HC11A 74HC85A 74HC147 decimal to binary encoder cmos 4008 74HC21A 74HC07A 74HC7244
Contextual Info: 2.H IG H SPEED CMOS SELECTION GUIDE NÄ N D NOR A ND OR IN V E R T E R ,B U F FE R 74HC00A 74HCT00A 74HC03A 74HC10A 74HC20A 74HC30 71HC132A 74HC133A GATE 74HC02A 74HCT02A 74HC27A 74HC4002A 74HC4078 74HC08A 74HCT08A 74HC09A 74HC11A 74HC21A 74HC32A 74HCT32A 74HC4072

74HC76

Abstract: DIP-20 M74HC7643 M74HC7643B1R M74HC7643M1R M74HC7643RM13TR M74HC7643TTR
Contextual Info: 74HC7643 OCTAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS INVERTING/NON INVERTING • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 13ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VH = 1.2 V (TYP.) at VCC = 6V SYMMETRICAL OUTPUT IMPEDANCE:

74HC7645

Abstract: 74HC76 DIP-20 M74HC7645 M74HC7645B1R M74HC7645M1R M74HC7645RM13TR M74HC7645TTR
Contextual Info: 74HC7645 OCTAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS NON INVERTED • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 13ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VH = 1.2 V (TYP.) at VCC = 6V SYMMETRICAL OUTPUT IMPEDANCE:

74hc76

Abstract: DIP-20 M74HC7640 M74HC7640B1R M74HC7640M1R M74HC7640RM13TR M74HC7640TTR 74HC7640 M74HC76
Contextual Info: 74HC7640 OCTAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS INVERTING • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 13ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VH = 1.2 V (TYP.) at VCC = 6V SYMMETRICAL OUTPUT IMPEDANCE:

74LS76D

Abstract: M74HC76
Contextual Info: rrr s g s -th o m s o n Ä T # ms4 h c ? 6 R fflD O œ iL iO ÏÏM iD g i M 7 4 H C 7 6 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR • HIG HSPEED fMAX = 65 MHz TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 2 jiA (MAX.) AT 25 °C ■ OUTPUT DRIVE CAPABILITY

FZH115B

Abstract: fzh261 FZK105 FZH131 FZJ111 FZH115 FZH205 Multiplexer IC 74151 FZH265B 74LS104
Contextual Info: Digital I.C.s, 74INTEGRATED CIRCUITS DIGITAL TTL, 74LS & 74HC Series Quad 2-input NAND gate Quad 2-input NAND gate, open collector Quad 2-input NOR gate Quad 2-input NOR gate, open collector Hex inverter Hex inverter, O/C collector Hex inverter, Buffer 30V O/P

74HC76

Abstract: DIP-20 M74HC7643 M74HC7643B1R M74HC7643M1R M74HC7643RM13TR M74HC7643TTR
Contextual Info: 74HC7643 OCTAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS INVERTING/NON INVERTING • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 13ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VH = 1.2 V (TYP.) at VCC = 6V SYMMETRICAL OUTPUT IMPEDANCE:

RS flip flop IC

Abstract: logic ic 74LS76 pin diagram pin configuration of 74LS76 IC IC 74LS76 74LS76 IC 74ls76 JK flip flop IC j-k flip flop 74ls76 pin diagram for IC 74ls76 M74HC76P
Contextual Info: MITSUBISHI HIGH SPEED CMOS 74HC76P DUAL J-K FLIP -FLO P WITH S E T AND R ES ET D ESC R IPT IO N The M 74H C 76 is a sem iconductor integrated circuit con­ PIN C O NFIG URATIO N TO P V IEW sisting of tw o n e g a tiv e -e d g e trig g e re d J-K flip flops w ith in­

Contextual Info: M IT S U B IS H I HIGH SPEED CMOS 74HC76P DUAL J-K F L IP -F L O P W IT H S E T AND R ESET DESCRIPTION The M 74H C 76 is a sem iconductor inte grated circu it con­ PIN CONFIGURATION TOP VIEW sisting of tw o n e g a tiv e -e d g e trig g e re d J -K flip flops w ith in­

74HC76

Abstract: DIODE A7N 54HC 74HC M54HC76 M74HC76 M74HC76B1N
Contextual Info: SGS-THOMSON M 54HC76 74HC76 D M[l[LIl gTr[S (RÖD©i DUAL J-K FLIP FLOP WITH PRESET AND CLEAR • HIGH SPEED fMAX = 60 MHz (TYP. at VCC= 5V ■ LOW POWER DISSIPATION Ice = 2 nA (MAX.) at 25°C ■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS 1 ■ BALANCED PROPAGATION DELAYS

74hc273

Abstract: zo125 HD74HCOO HD74HC04
Contextual Info: Application Note 1. input Protection Circuit An St-gate process is applied to Hitachi’s high-speed C M O S input protection resistor as show n in Figure tai, input over­ logtc ICs. They have a thinner gate oxide com pared to conven­ current flow s directly to the power suppiy and the destruction