74HC402 Search Results

74HC4024

Abstract: 4000B 74HC4024D 74HC4024DB 74HC4024N 74HC4024PW
Contextual Info: 74HC4024 7-stage binary ripple counter Rev. 4 — 29 September 2010 Product data sheet 1. General description The 74HC4024 is a high-speed Si-gate CMOS device and is pin compatible with the 4024 of the 4000B series. The 74HC4024 is specified in compliance with JEDEC

Contextual Info: Technical Data File N u m b e r CD54/74HC4024 CD54/74HCT4024 1683 High-Speed CMOS Logic 12 11 9 6 5 4 MR- 3 Q1* Q2 7-Stage Binary Ripple Counter Q3 04 Q5 06 Q7 T ype Features: • F u lly s ta tic o p e ra tio n : m B u ffe re d in p u ts : m C o m m o n re se t

Contextual Info: M54/74HC4020 M54/74HC4040 SGS-THOMSON M HC4020 14 STAGE BINARY COUNTER HC4040 12 STAGE BINARY COUNTER • HIGH SPEED fMAX = 73 MHz TYP. at Vcc = 5 V ■ LOW POWER DISSIPATION Icc = 4 |iA (MAX.) at Ta = 25 °C ■ HIGH NOISE IMMUNITY V nih = V nil = 28 % Vcc (MIN.)

CD74HC4020

Abstract: CD54HC4020 CD54HCT4020 CD74HCT4020 74HC4020 T45-2
Contextual Info: T"- H 5 - Z 5 - / 7 Technical D ata. CD54/74HC4020 CD54/74HCT4020 F ile N u m b e r HARRIS SEMICOND SECTOR 27E ]> 1484 43G2271 QQlTûâS 2 El HAS High-Speed CMOS Logic 14-Stage Binary Counter Jfi. INPUT puucs T y p e Features: IUSTCJI ftCSCT ncs-iwsi>> • F u lly s ta tic o p e ra tio n

74hc4028

Abstract: 4028B 54HC 74HC M54HC4028 M74HC4028
Contextual Info: SGS-THOMSON M 54HC4028 M 74HC4028 BCD-TO-DECIMAL DECODER HIGH SPEED tpD = 25 ns TYP. at VCc = 5V LOW POWER DISSIPATION = 4 i i A (MAX.) at TA = 25°C HIGH NOISE IMMUNITY Vnih = V N|L = 28% VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE

74hc4020

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC54/74HC4020 1 4-S tage Binary Ripple Counter High-Performance Silicon-Gate C M O S J SUFFIX CERAMIC CASE 620-09 The MC54/74HC4020 is identical in pinout to the standard CMOS MC14020B. The device inputs are com patible w ith standard CMOS outputs; w ith pullup resistors,

74HC4022P

Abstract: 74HC4022
Contextual Info: M IT S U B IS H I HIGH SPEED CMOS u v a • '0''S &TC & V M 74HC4022P/FP/DP ‘" O CTAL C O U N T E R /D IV ID E R DESCRIPTION T h e M 7 4 H C 4 0 2 2 is a sem ico nductor in teg rated circuit con­ PIN CONFIGURATION TOP VIEW sisting of an octal counter with reset input and d e c o d e

54HC4024

Abstract: 4024C
Contextual Info: r z 7 S G S -T H O M S O N M 54HC4024 M 74HC4024 A 7# 7 STAGE BINARY COUNTER HIGHSPEED tpD = 1 3 ns TYP. AT Vcc = 5 V LOW POWER DISSIPATION Ice = 4 jiA (MAX.) AT Ta = 25’ C HIGH NOISE IMMUNITY Vnih = Vnil = 28 % Vcc (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTLLOADS

HC4024

Contextual Info: [ /Title CD74 HC402 4, CD74 HCT40 24 /Subject (High Speed CMOS CD54/74HC4024, CD54/74HCT4024 Data sheet acquired from Harris Semiconductor SCHS202A High Speed CMOS Logic 7-Stage Binary Ripple Counter November 1997 - Revised May 2000 Features Description

Contextual Info: [ /Title CD74 HC402 4, CD74 HCT40 24 /Subject (High Speed CMOS CD54/74HC4024, CD54/74HCT4024 Data sheet acquired from Harris Semiconductor SCHS202A High Speed CMOS Logic 7-Stage Binary Ripple Counter November 1997 - Revised May 2000 Features Description

Contextual Info: Technical Data CD54/74HC4020 CD54/74HCT4020 File N um ber 1484 High-Speed CMOS Logic 14-Stage Binary Counter Type Features: • ■ ■ • ■ MASTER RESET F u lly sta tic operatio n B uffe red inpu ts C om m on reset N egative edge p u ls in g Typical f M* x = 50 MHz @ VCc = 5 V, CL = 15, 7 * = 25° C

75hct

Contextual Info: Technical Data File N um ber 1683 CD54/74HC4024 CD54/74HCT4024 High-Speed CMOS Logic 11 02 7-Stage Binary Ripple Counter — Q3 04 05 MR - 06 07 Type Features: • Fully static operation: ■ B uffered inputs: m C om m on reset ■ Typical tu t* = 50 MHz @ Vcc — 5 V, C l ~ 15 pF, 7V = 25° C

Contextual Info: [ /Title CD74 HC402 4, CD74 HCT40 24 /Subject (High Speed CMOS CD54/74HC4024, CD54/74HCT4024 Data sheet acquired from Harris Semiconductor SCHS202A High Speed CMOS Logic 7-Stage Binary Ripple Counter November 1997 - Revised May 2000 Features Description

Contextual Info: 74HC4024 7-stage binary ripple counter Rev. 5 — 9 December 2011 Product data sheet 1. General description The 74HC4024 is a high-speed Si-gate CMOS device and is pin compatible with the 4024 of the 4000B series. The 74HC4024 is specified in compliance with JEDEC

m22j

Abstract: CD541 75hct CD54HC4024 CD54HCT4024 CD74HC4024 CD74HCT4024 1117T CMR07
Contextual Info: .Technical Data File N um ber CD54/74HC4024 CD54/74HCT4024 1683 r- -\6 -z ~ 3 ~ / 7 High-Speed CMOS Logic HARRIS SEMICOND * — MR — SECTOR l i o i- l l oa — Q3 — 04 — 05 — 08 — 07 27E D m 43Q2271 QQ17ÔHQ b SHAS 7-Stage Binary Ripple Counter Type Features:

74HC4020P

Abstract: 14020b
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC54/74HC4020 1 4-S tage Binary Ripple Counter High-Perform ance Silicon-Gate CM O S J SUFFIX CERAMIC CASE 620-09 The M C 54/74H C 40 20 is id entical in p in o u t to th e standard CM O S M C 14020B. The device in p u ts are c o m p a tib le w ith sta n d a rd C M O S o u tp u ts , w ith p u llu p resistors,

C4024

Abstract: MC14024
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA b3b?esE ocnsoaa ass nom _ blE i> MOTOROLA SC LOGIC I M C54/74HC4024 T-H 7-Stage Binary Ripple Counter High-Performance Silicon-Gate C M O S J SUFFIX CERAMIC CASE 632-08 The MC54/74HC4024 is identical in pinout to the standard CMOS MC14024. The

Contextual Info: MOTOROLA SC -CLOGIO OS b3b?SS2 □GflGS'i? □ MOTOROLA T - ^ S ' 23- n SEMICONDUCTOR TECHNICAL DATA MC54/74HC4020 14-S tag e Binary Ripple Counter High-Performance Silicon-Gate CM OS J SUFFIX CERAMIC CASE 620*09 T h e M C 5 4 /7 4 H C 4 0 2 0 is id e n tic a l in p in o u t to th e s ta n d a rd C M O S M C 1 4 0 2 0 B . T h e

74HCT4020BQ

Abstract: 74HC4020N 74HCT4020D 74hc4020 74HCT4020N 74HC4020D 74HC4020DB 74HCT4020 74HCT4020DB HEF4020B
Contextual Info: 74HC4020; 74HCT4020 14-stage binary ripple counter Rev. 03 — 20 January 2010 Product data sheet 1. General description The 74HC4020; 74HCT4020 are high-speed Si-gate CMOS devices and are pin compatible with the HEF4020B series. They are specified in compliance with JEDEC

Contextual Info: T> Sb E F= 7 m 7^2*1237 GG4037b 744 HS6TH S C S -T H O M S O N [*fô m [I g T ÎÜ M O (g § M 54HC4022 M 74HC4022 S G S- THOMSON OCTAL COUNTER/DIVIDER • HIGH SPEED fMAX = 44 MHz (TYP. at VCC= 5V ■ LOW POWER DISSIPATION lcc = 4 /¿A (MAX.) at TA = 25°C

Contextual Info: [ /Title CD74 HC402 0, CD74 HCT40 20 /Subject (High Speed CMOS CD54/74HC4020, CD54/74HCT4020 Data sheet acquired from Harris Semiconductor SCHS201A High Speed CMOS Logic 14-Stage Binary Counter February 1998 - Revised May 2000 Features Description • Fully Static Operation

Contextual Info: [ /Title CD74 HC402 0, CD74 HCT40 20 /Subject (High Speed CMOS CD54/74HC4020, CD54/74HCT4020 Data sheet acquired from Harris Semiconductor SCHS201A High Speed CMOS Logic 14-Stage Binary Counter February 1998 - Revised May 2000 Features Description • Fully Static Operation

Contextual Info: 74HC4024 7-stage binary ripple counter Rev. 6 — 23 August 2012 Product data sheet 1. General description The 74HC4024 is a high-speed Si-gate CMOS device and is pin compatible with the 4024 of the 4000B series. The 74HC4024 is specified in compliance with JEDEC

74HC4022

Abstract: 74HC4022B
Contextual Info: rz z Ä 7# S G S -T H O M S O N M 54HC4022 M 74HC4022 OCTAL COUNTER/DIVIDER • HIGHSPEED f MA X = 57 MHz TYP. at Vcc = 5 V ■ LOW POWER DISSIPATION Ice 4 nA (MAX.) at T a = 25 "C ■ HIGH NOISE IMMUNITY Vnih = V n il = 28 % Vcc (MIN.) ■ OUTPUT DRIVE CAPABILITY